But the ideal package solution is up for debate.
While the fashion industry may have a ban on thin models for its
runways, in consumer electronics, thin is in. But how does one make a
thin portable product and at the same time include the greater
functionality consumers demand?
Apple set off the consumer preference for thin in September 2005
when more than one million iPod nanos sold in the first 17 days of its
release. Less than 0.27" thick, the iPod nano spurred a flood of thin
products, especially in mobile phones. Instead of highlighting features
such as standby time or talk time, advertisements for cellphone promote
the "cool" of being thin. How thin can they go? It depends on which
package is used.
Stacked die packages and WLPs. Today's cellphone is a window
into packaging trends. Stacked die packages have been around for a
while, and there is no shortage of these products in today's phones –
as many as two or more per unit. In Japan, Sharp pioneered much of the
work in stacked die packages, shipping the first SRAM and flash memory
packages in the 1990s. Increasingly, these stacked die packages contain
more than two die – mostly memory. And they are downright anorexic:
Motorola's RAZR V3, the thinnest phone of its time, contained a 1.0 mm
thick two-die stacked package and at least 14 wafer-level packages. The
height of the WLPs ranged from 0.27 to 0.5 mm, offering the lowest
profile possible. Greater numbers of companies are using small,
low-profile WLPs in mobile phones.
Thinner die stacks are also being introduced, despite the
difficulties with handling, dicing and packaging thin wafers. A
four-die stack containing NAND and SDRAM from Samsung found in the
Nokia Vodafone 804SS is just 1.0 mm thick. To achieve the low-profile,
two of the die are thinned to 70 µm, the other two to 80 µm.
Stacked die packages. While stacked die packages offer a way
to increase the functionality in a limited board area by moving in the
z direction, the issues become problematic when stacking logic and
memory. If a stacked die memory package is not functional, throwing it
away is an inexpensive proposition. For packages containing stacked
logic and memory, the need for known good die (KGD) memory is
essential. Obtaining KGD is a logistics and business concern for
companies that do not make their own memory. For this reason, stacked
die packages are becoming increasingly popular for many consumer
applications.
It often takes more than 10 years for a packaging technology to
become mainstream, and the stacked package concept is no exception.
Japanese companies such as Hitachi, Matsushita, Mitsubishi, NEC, NTT,
Toshiba and others introduced the first stacked packages in a variety
of memory applications. Computer makers such as Unysis also used
stacked memory for computer applications years ago, and companies such
as Staktek made stacking TSOPs into big business for memory products
found in PCs. For years military/aerospace applications have used
stacked packages, supplied by companies such as Irvine Sensors and
Vertical Circuits in the U.S. and 3D Plus in France. These companies
ship many stacked modules today, some containing logic and memory.
While many of the early packages for consumer applications were
focused on stacking memory, options for stacking memory and logic have
also been developed. Motorola's Advanced Package Development and
Prototype Lab in Austin, TX, developed a package called a 3-D BGA DCA
TAB COB MCM technology (using every acronym in the packaging
vocabulary). Motorola introduced a stacked BGA approach as early as
December 1992. Toshiba's paper-thin package, targeted at consumer
applications, was introduced in 1999. Some of these package concepts
have evolved into the package-on-package (PoP) that Amkor and others
are promoting today.
Amkor's PoP. In collaboration with several key players,
Amkor's PoP has been under development for the past four years. The PoP
has been in production for approximately a year, and today's
applications include mobile phones, digital cameras and MP3 players.
The package was developed because it offers several advantages over
stacked die packages, including the flexibility of using memory from a
variety of suppliers and testing prior to assembly. While it is
slightly larger and thicker than a stacked die package, requires
co-design for the top and bottom packages, and costs more than stacked
die packages, many companies are finding it the best solution from the
standpoint of total cost, including test, logistics and other factors.
With some versions of the package and new technology developments, it
is possible to stack die as thin as 75 µm.
Considerable time and effort has been put into PoP infrastructure
development. JEDEC standards for the pin-out footprints for the
top-stacked package have been developed, new packaging stacking
equipment from as many as five equipment suppliers is now available,
and five major EMS companies are in production or development with
board-level assembly PoP. At least 10 major OEMs in the handset and
digital still camera markets are adopting PoP.
Clearly a variety of packages are under consideration. Will an
increased number of modules such as PoP be used? Will companies use
more single chip packages with finer pitch? Will WLPs offer the
smallest form factor solution? It is almost certain that the consumer
products of tomorrow will contain multiple package configurations, and
no one solution will meet all needs.
E. Jan Vardaman is president of TechSearch International, Austin, TX; jan@TechSearchInc.com. Her column appears bimonthly. |
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