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Tuesday, 01 April 2008 |
FEATURES
Component Packaging
Design and Modeling of High-Speed, High-Density 3-D CSPs and Memory Modules
DDR2 pushed memory clock frequencies to 400 MHz and data rates to 800 Mbps. DDR3 further pushes clock frequencies to 800 MHz, while DDR4 is up to 1.6 GHz. New packaging technologies such as die stacking and package-on-package (PoP) are being developed to accommodate the advances.
By Dr. Frank Y. Yuan and Richard Crisp
Benchtop Cleaning
The ‘Big Brush Off’ Revisited
In rework and repair, if you can’t rinse, you can’t clean. A prescription for cleaning a board after hand-soldering.
By Mike Jones
Cover Story
Impact of Soldering Atmosphere on Solder Joint Formation
This collaborative effort between Flextronics and Vitronics Soltec investigated different techniques that can significantly reduce nitrogen consumption without affecting final assembly quality. Alternative nitrogen supply methods were studied, such as applying nitrogen only on the reflow areas in combination with different oxygen ppm levels during reflow process and their impact on the secondary wave soldering process of copper OSP PCBs.
By Ursula Marquez de Tino, Dr. Denis Barbini and Wesley Enroth
Packaging Developments
Beyond Moore’s Law
Evolving 3-D system-in-packaging architectures require advanced co-design tools linked with modeling and simulation capability to facilitate effective collaboration between system, device and packaging engineers, and new materials that meet environmental requirements. But as an integrator of components and technologies from different areas, SiP is positioned to become a primary architecture.
By Dr. W.R. Bottoms
Protecting Parts
ESD Control For Class 0 ESDS Devices
A summary of problems associated with protecting state-of-the-art devices with standard ESD controls, and specific controls necessary for reliable protection for devices sensitive between 20 and 100V.
By Roger Peirce
Program Management
Growing Your Brand
For nearly three decades, Sue Mucha has led EMS marketing teams at companies large and small, public and private. Now the Circuits Assembly columnist has written about her experiences prepping EMS teams on growth strategies in a new book.
By Mike Buetow
ESD Standards
This Year’s Model
ESD qualification methods for ICs have a history requiring performance to human-body-model levels of 2kV, and in some cases 200V for machine model levels. New investigations on target levels establish more realistic levels for HBM and MM.
By Dr. Charvaka Duvvury and Dr. Harald Gossner
FIRST PERSON
TECH TALK
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Assembly Insider
On the cover: Flux chemistry can dramatically affect solder joint results. (Photo by Mariano Ruiz)
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