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Agilent’s Chipset Solution Tests High-Speed SOC Devices Print E-mail
Tuesday, 02 November 2004

Agilent Technologies' automated test solution for functional, at-speed test reduces the cost of testing high-speed, system-on-a-chip (SOC) devices. Part of the 93000 SOC Series, the high-speed I/O solution enables functional testing of high-pin-count devices, such as next-generation PC chipsets up to speeds of 3.6 Gb/s.

 

Enabled by the Pin Scale 3600 Digital Card, offers per-pin scalability from 800 Mb/s to 3.6 Gb/s. High-speed SOC devices are widely used in computer, digital consumer, communications and networking products.

 

Each pin offers both single-ended and differential I/O test capabilities to test a range of interfaces including DDR, G-DDR, PCI Express, S-ATA, HyperTransport and Front Side Bus (FSB). The automated test equipment can be matched to the device through software scaling, pin by pin.

 

Features a test processor per-pin architecture, which localizes all test processing, resulting in minimal measurement overhead and higher throughput. Delivers a differential pin edge placement accuracy (EPA) of better than ±30 ps.

 

With up to eight independent clock domains, can satisfy timing needs for concurrent at-speed testing of multiple buses running at non-friendly speed ratios (bus fractions).

 

Available in various data-rate, memory and pin-count configurations.

 

Agilent Technologies Inc., agilent.com



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