Reflow Process Development Print E-mail
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Written by Jon Silin and Ursula Marquez de Tino   
Monday, 04 May 2009 13:02

Reflow SolderingForcing science on the long-held “art” of profiling.

Art is the use of skill and imagination in the production of things of beauty. Is a reflow profile art? It could be, provided the result of the profile is a robust, repeatable reflow process. However, learning the art of reflow profiling is a long, imaginative road. Once mastered, it still requires significant time and effort.

Science is knowledge covering general truths or the operation of general laws, particularly as obtained and tested through scientific methods. Can science be applied to reflow profiles? Absolutely. Construction of general laws related to forced convection reflow oven characteristics permits fast, robust development of an in-specification profile, important to ensure good solder joint formation, high yield rates and assembly reliability. An optimal profile takes into account the specifications of the solder paste, the various components and laminate, while also taking into consideration the oven capabilities (e.g., a reflow oven with more heating zones has more flexibility than shorter ovens when it comes to meeting specs).

A reflow profile breaks down as follows:

  • Ramp-up heating rate is the positive change of temperature per unit time. Typical specifications list a maximum of 3°C/sec. Defects associated with exceeding this rate are component damage, poor solder paste slump, or adverse effects on flux evaporation and activation characteristics.
  • Thermal soak is the time and temperature required to level temperature across the board before reflow. However, when temperature equilibrium is easily achieved due to simple boards and good oven heat transfer, this soak interval can be eliminated. (This is known as a linear profile.) Thermal soak represents the flux activation and subsequent cleaning of oxides from all surfaces.
  • Time above liquidus (TAL) is a defined range of time that the PCB is held at a temperature above the solder melting point. Defects associated with insufficient TAL are poor wetting and incomplete joint collapse, while defects associated with excessive TAL are formation of thicker, brittle intermetallic layers; potential board or component failure due to exposure, and dewetting.
  • Peak temperature is the maximum temperature allowable for different components and solder paste. The combination of solder paste specifications, component moisture sensitivity level (MSL) and laminate requirements limit the maximum possible temperature. Defects associated with exceeding Peak Temperature are the popcorn effect observed in components, delamination, cracking, and lifting observed in the laminate.
  • Cooling rate is the negative change of temperature per unit time. Typical component and solder specifications limit the negative value to greater than -6°C/sec. Defects associated with exceeding the limit are based on the CTE mismatch of the system; i.e., excessive cooling induces stress at the interfaces of the component body, solder and laminate.
  • Total heating time is the time available to optimize the aforementioned factors and is typically specified by the solder paste manufacturer.

Envision this scenario: A new employee, without prior profiling experience, is tasked with profiling a PCB. You tell them which paste to use and then point to an oven. The complexity of profiling process is underscored by the confusion on the rookie’s face followed by the cascade of questions: How fast should the conveyor go? What temperatures do the heaters get set to, and how do you know that? The answers are based on board size, an intuitive understanding of heat transfer, oven behavior and process tradeoffs. You might have profiled a similar board in the past and can reference that experience to come up with a starting point for heater set points and conveyor speed. However, sans that inventory of profiling experience, it might take a new employee several iterations to develop the desired process.

The solution is to develop a database of profiles that capture the process engineer’s experience combined with profiling expertise. The database would

  • Shorten the process development learning curve.
  • Be organizationally available to everyone to use.
  • Remain within the organization, not individual-dependent.
  • Reduce the time to develop profiles by minimizing the conventional pitfalls of the “first guess” at process set points.
  • Provide a consistent approach and results.
  • Not require the process engineer to start developing profiles.

We addressed this by developing a product to provide an in-specification or near specification reflow profile with minimal profiling (or none) needed. This was achieved by populating databases with various types of profiles, including those based on SnPb or Pb-free, as well as linear or ramp soak spike reflow types. A proprietary test vehicle was designed to simulate PCB board types of varying complexity, from simple two-layer to complex 16-layer PCBs, for the purpose of populating the databases. This test vehicle, along with commercial profiling software, was employed to systematically optimize profiles for a variety of pastes, profile shapes and board types.

The criterion employed to evaluate the accuracy of both the predicted and validated profile was the Process Window Index (PWI). PWI takes into account measures of the aforementioned reflow profile attributes and provides a single number to indicate compliance with the specification or to what degree. A PWI value equal to or less than 100 is indicative of a profile that meets all reflow process specifications. A PWI value between 101 and 200 is indicative that at least one reflow process parameter is slightly out of spec. Table 1 lists examples of PWIs between 101 to 200 and the corresponding “out of specification” reflow parameter.

 Table 1

An evaluation was undertaken to gauge the accuracy and precision of predicted reflow profiles. In total, 56 unique profiles were predicted and ranked based on the precision of the defined parameter specifications. These unique profiles were characterized by the selective combination of 11 different process windows applied to seven different boards. Actual PCB dimensions ranged from 8.5" x 6" x 0.40" thick with a mass of 74 grams to 17" x 11.2" x 0.125" thick with a mass of 1,260 grams. (The latter was validated with instrumented BGA balls to make the assessment more relevant and challenging.)

The results show that 55% of the validated profiles achieved a PWI less than 100. In these cases, the profile satisfied all process criteria. The second group of data contained 33% of profiles characterized with PWIs between 101 and 200. Figure 1 shows results of the PWI for the 56 validation runs. The box contains 75% of the data points per PCB type; the horizontal line represents the median, and the cross hair represents the mean.

Fig. 1

While no trend is readily apparent, second-level testing using a third-party system validated the following conclusion: 88% of the predicted profiles required either no further optimization or one iteration to develop of a robust reflow process.

The advantages of a data-driven reflow profile prediction tool are significant to any electronics manufacturing organization. This tool and the data satisfy the six objectives, and illustrate how science can be applied to what was traditionally held by the electronics industry as art.

Jon Silin is process technician at Vitronics-Soltec; This e-mail address is being protected from spambots. You need JavaScript enabled to view it . Ursula Marquez de Tino is a process and research engineer at Vitronics Soltec, based in the Unovis SMT Lab (; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .



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