SAN JOSE – SMTA requests abstracts for the 10th Annual International Wafer-Level Packaging Conference.

The event will be held at the DoubleTree Airport Hotel here Nov. 4 – 7.

Suggested topics include wafer level chip scale packaging; flip chip bumping; fan-out and redistribution; wafer and device cleaning; WL-enabled devices; nanotechnology; quality, reliability, and COO; MEMS processes and materials; MEMS design tools or methods; nano-MEMS and bio-MEMS; MOEMS integration; lab-on-chip; MEMS integration and interconnects; RF/wireless, sensors, mixed technology, optoelectronics; 3D WLP; thru silicon vias; silicon interposers; IC packaging substrate; embedded die and passives; modeling and simulation tools and methods; FEOL vs BEOL; chip to chip optical connection, and stacking processes.

The deadline for abstracts is Mar. 29.

For more information, contact Patti Hvidhyld at This e-mail address is being protected from spambots. You need JavaScript enabled to view it .