Several important process and equipment revelations were made at the annual Pan Pac symposium.

The 18th annual Pan Pacific Microelectronics Symposium took place Jan. 22-24 in Maui, HI. The conference brought together the industry’s top specialists from North America, Europe, Asia and Australia to share the most up-to-date science of electronics manufacturing and reliability. Technical papers and presentations covered a diverse range of electronics topics, including silicon interconnects and packaging, embedded devices, PCB assembly and cleaning, failure analysis and reliability models.

The Best Paper honor was awarded to Rolf Aschenbrenner, Ph.D., Fraunhofer Institute for Reliability and Microintegration, for his paper, “Panel Level Packaging – A Manufacturing Solution for Cost Effective Systems.” The paper highlighted some of the challenges in embedding high I/O power chips, including heat removal, electrical isolation and molding processes. This is a distinguished honor, as the award recipient is determined by the conference attendees.

Some of the SMT-related presentations of particular interest to Circuits Assembly readers included:

• Asymtek’s Horatio Quinones reviewed the latest advances in fluid jetting technology, highlighting the breakthrough of jetting Type 4 solder pastes. Until now, jetting has been performed with the finer powder Type 5 pastes, which bring reflow challenges like graping and balling. Larger particle size pastes were notorious for clogging jet seats after only a few shots. New jetting systems are able to produce very fine lines at speeds of up to 100mm/sec with no clogging. Applications include adding extra solder paste for RF shields, pin-in-paste reflow, BGA corner balls or SMT joints subject to frequent mechanical stresses, and dispensing paste for very fine feature components, MEMs lids or cavity PCBs.
• Kyzen’s Tom Forsythe presented new findings on cleaning that change the way we look at low-standoff components. Gap height is emerging as a significant factor affecting cleanability. As IC packages get miniaturized, gap height shrinks, creating new challenges for cleaning underneath the components – many of which were designed for no-clean soldering only. Forsythe presented the results of a sizable DoE to unlock the secrets of cleaning low-gap chip scale packages; it characterized the effectiveness of three cleaning solutions at five concentrations and four temperatures on two solder paste formulations. A lot of really good data to digest.
• Universal instruments’ Martin Anselm gave a fantastic overview of the PCBA failure analysis process, breaking it into four areas of investigation: material quality, assembly process, design and reliability. Anselm’s presentation was a summary of the three-hour class offered at the annual SMTAI conference, which contains valuable information for anyone in SMT production or new product engineering, as well as quality and SQA. The knowledge of how solder joints fail, what makes them fail, and the circumstances under which they fail is a powerful intellectual tool for people involved in PCB design, assembly or inspection processes.
• Northstar Imaging’s Wes Wren opened our eyes to state-of-the-art x-ray imaging. After explaining the difference between contrast and resolution, and the implications of tube-to-detector distance, he blew away the audience with images of new 4D tomography. The fourth dimension is the time domain, and the x-ray videos of real-time processes, like welding or the movement of a rack and pinion, are amazing. Go to www.xviewct.com/industrial-ct-news/news-items/taking-3d-x-ray-inspection-to-a-new-dimension-4d-computed-tomography to see some really cool videos.
• Tom Borkes gave us a lesson in economics that we all can use: realistic cost bases for PCB assembly in various world regions, and ideas on how to compete on a global scale. His analysis included labor, materials and a discussion of nations’ predispositions for off shore manufacturing. The paper introduced a noteworthy acronym: DF MATERS. That’s Design For: Manufacturing, Automation, Test, Environment, Reliability and Service.
• Nihon Superior’s Keith Sweatman introduced nanosilver particles that sinter themselves together at 150°C. In fact, they have such an affinity to self-sinter, the particles need to be protected by a passivation coating. They are less than 100nm or 300 atoms wide, and can be used in a variety of applications, including replacing high-lead solders in semiconductor die attach. They have good electrical and thermal conductivity and have been proven reliable, even in high-temperature operating environments. Solder pastes incorporating nanosilver have many different uses, are usually tailored to the application to address specific processing or performance characteristics.

In addition to the discussions of new technologies and methods, many general industry updates were provided, including Dieter Bergman’s review of IPC standards development, Chuck Bauer’s overview of new and novel interconnect technologies, Chuck Richardson’s iNEMI roadmap, and Wei Koh’s keynote address on China’s semiconductor development efforts.

The Pan Pacific Microelectronics Symposium is a three-day, single track conference that gives experts from across the industry and around the world the opportunity to learn from and inspire each other. It is made possible in large part by corporate sponsorships from Kyzen, Libra Industries, SonoScan, Indium, Nihon Superior and Nordson. The SMTA organizers and attendees sincerely appreciate their support.

Next year’s conference will be held Feb. 11-13, 2014 on the Big Island of Hawaii, and the call for papers is now open.

Chrys Shea is founder of Shea Engineering Services (sheaengineering.com); chrys@sheaengineering.com.