News
Mentor’s Expedition Enterprise
Published: 07 December 2005
by Joe Krolla
Simultaneous team design using a common software, integrated flow.
Expedition Enterprise provides a complete solution for PCB and FPGA design, embedded in a global enterprise environment. Component selection in a centralized and configurable data management system permits part selection based on electrical characteristics and business criteria (e.g., product line, vendor, RoHS criteria, cost). The data are updated through process integration with PLM or MRP systems. Filters can be set to restrict use of component categories or to exclude the visibility of specific information to contractors or non-engineering personnel.
 Enterprise, for PCB and FPGA design, permits collaboration throughout the design chain. |
Benefits of the integrated component and library management include constant quality due to internal standards; support or “design-anywhere” requirements through distributed librarian teams; instant access to parts and their lifecycle status from anywhere; common component information available to everybody with equal quality and managed users access; and automated change management. Once any characteristic of a part changes, the information is visible to all users.
Another key benefit is the collaboration between the software, FPGA and PCB design communities. Collaboration between FPGA and board designers is often limited to pin information shared in lists or spreadsheets. Symbols and pin mappings have to be created manually for the FPGA in the CAD library. This process effort is intensive and error-prone, especially with regard to change management. Typical scenarios include:
- FPGA selection: Changing the FPGA based on technical and commercial criteria requires the time-consuming and mainly manual exchange of pin data between FPGA specialist and the PCB designer. Things become more complicated if teams are dispersed or work in different time zones.
- Change management: If a change in the product specification requires a change in the PCB, components including FPGAs need to be moved and possibly rotated on the PCB. This requires a substantial re-optimization of the nets connected to the FPGA, including changing the pin mapping and the related software to program the FPGA.
The process of integrating a single FPGA into the design can take weeks, which can easily be multiplied in instances of changes and redesigns. Tool flows, such as integration between DxDesigner, IO Designer and Expedition, enable tight integration between the necessary tools to commonly share the model representations across the domains. IO Designer automatically generates symbols for logical representation in the schematic, and maps to the physical package.
The FPGA pin mapping can be optimized, I/O banks can be swapped, pins moved and busses unraveled. As a result, the routing quality is improved and overall quality increases. Physical constraints, such as timing and differential pairing, are followed much better. The optimized pin information for the package is immediately updated through an engineering change order in the PCB layout.
Typical reasons for concurrent layout are diverse: outsourcing portions and partitions of the design; shortening the design process through parallelization of placement and routing tasks; involving multiple specialists from different design groups and locations in a timely fashion. Typically the design is split in rigid partitions. Splitting and re-joining can be time-consuming. Specialists do not have the simultaneous ability to reach all partitions with respective nets. They need to bring in specialists – for instance, in power, RF or SI – either on the complete (un-partitioned) board, or to work through each partition step-by-step.
In a true simultaneous team design environment all specialists and designers work in the same session, sharing the entire real estate on the board. Once the design session is loaded on the client, network traffic between client and server is low. This permits offshore access or remote login with smaller network bandwidth. Every session participant can immediately see what the other participants are doing. Standard instant messaging methods add chat communication with the co-members of this session, permitting participants to quickly close the loop.
This method provides significant time savings in the design process, making sure that the use of the routing area is highly optimized. It permits optimized utilization of a few, high qualified specialists. Since the PCB layout process can count for as much as 40 to 50% of PCB development, a 30 to 70% reduction in time on selected projects can quickly save weeks or months.
An integrated design flow provides many more factors to increase the productivity in PCB development, such as global constraint handling, IP and design reuse, and project and user management.
These examples are just some of the main drivers. Only a highly integrated PCB design flow can provide the process integration required to achieve productivity increases. It is not just one tool that makes the difference: an orchestra of tools must work together, conducted by a process that provides all central information within a flow. This flow must be powerful and open enough to permit process integration on all levels: enterprise, overall design process, discipline specific or verification of data.
Joe Krolla is flow marketing manager, Mentor Graphics Corp. (mentor.com); joe_krolla@mentor.com.
