While data on emerging technology are always welcome, most want the nuts-and-bolts.

I recently returned from five weeks’ travel in China and India conducting process seminars. This trip was about my tenth to Asia during the past six years to teach. Previous journeys included Indonesia, Singapore, Malaysia, Thailand, Korea and Taiwan. I have visited China many times and have traveled to about 15 different cities there. However, this was my first trip to India. There I visited customers in Mumbai, Bangalore and Chennai.

Typically, my trips to Asia last from four to 10 weeks, and we visit many customers and locations. We typically present on emerging processes. In our process development laboratory, we conduct formal designed experiments (DoE) on various processes. We work with a number of partners to conduct these experiments, including suppliers of materials, AOI and placement equipment, academic organizations and professional societies. Our process development lab has a complete SMT assembly line so we can include printing, placement, reflow, dispensing, material, tooling (stencils, support tooling), and AOI factors in the DoE. (Also included: cleaning and wave soldering process factors, using our Electrovert lab in Camdenton, MO.)

The goal is always to provide as much actual shop floor process information as possible for use in developing and optimizing emerging processes. In addition, we present on everyday nuts-and-bolts process issues, such as optimizing solder paste printing, defect identification and prevention, and problem solving.

Not surprisingly, during the past few years, a good deal of our process development work focused on Pb-free issues. In 2006, in addition to continuing that work, we conducted two formal experiments on 01005 component assembly processes. We are planning several additional 01005 assembly process development experiments this year.

We select topics for a particular seminar based on input from local contacts, distributors and customers. Our seminars always generate a great deal of questions.

When I return I am often asked, What did you learn? and What were the most common questions from the customers? One thing I have learned is that there is a “maturing” group of process engineers. The process engineers I have met in China are educated, conscientious, eager to learn and hard-working. What they lack is practical experience. China’s electronics manufacturing industry has had dramatic growth. There was, and is, a shortage of experienced engineers to support this tremendous need for process expertise.

Those who attend the seminars are always grateful for information on emerging technologies, but most questions relate to day-to-day process issues. Here are a few of the most common questions and my responses:

Q: What is the best printed circuit board finish?

A: There is no single best finish. Each of the available finishes – ENIG, immersion silver, immersion tin, OSP, etc. – has advantages and disadvantages.

Q: How often should I wipe my stencil during paste printing?

A: There is no optimum number of prints between each stencil wipe. A number of factors affect how often you will have to wipe the stencil, including the board finish, stencil design, stencil technology, printing equipment operating parameters, etc.

I always get a number of questions about stencil design and fabrication. In response, I explain the “area ratio” and “aspect ratio” rules and discuss the available stencil fabrication technologies and their applicable applications. I also offer our stencil design software.

As you can see from these examples, the majority of companies are interested in information that will help them improve, and hopefully optimize, the process.

One point I always attempt to make is only one party can optimize one’s process: the user. Although, for the most part, customers have similar production equipment, board material and fabrication, materials, stencil design and fabrication and environment, no companies share the exact combination. If we include process engineer skill and experience, operator training and discipline, management effectiveness and other less tangible issues, each process’s uniqueness becomes more evident. Only the resident engineers, using sound, proven development tools, such as designed experiments, can optimize their particular process. Suppliers can help, but no supplier can optimize any particular situation unless they are resident in the facility for sufficient time to work with the company’s engineers. There are no shortcuts to process optimization.

Many attendees contact me with follow-up questions. My experiences in Asia, primarily China, have taught me that a need for information exists on emerging technologies with which we like to work. Just as vital, though, is providing help with nuts-and-bolts process optimization, defect prevention and problem solving. I believe this would be true in virtually any region where electronics manufacturing is developing or undergoing dramatic growth.

As always, I’m happy to help.


Joe Belmonte is project manager, advanced process development, at Speedline Technologies (speedlinetech.com); jbelmonte@speedlinetech.com. His column appears bimonthly.