How SPI cut defects by 80% at an automotive electronics plant, plus a primer on how it works.

“Solder paste inspection adds no value in the SMD line. It does not place parts. It does not reflow parts.” – Vice President, Top 5 EMS Manufacturer

This is a powerful statement, and not uncommon in an industry that has, to date, unsuccessfully implemented the full value of AOI technologies. Hundreds of millions of dollars have been spent to reach the promise of improved yields, yet most manufacturing operations are still “inspecting defects out.” According to Deming, Taguchi, and Six-Sigma methodology, the goal must be to improve the process. At Three-Sigma, yields are 93.3% or 66,800 DPMO (defects per million opportunities); At Five-Sigma, yields are 99.977%, with 230 DPMO. At Six-Sigma, there are just 3.4 DPMO. This is a difficult target to meet.

A number of articles and technical papers have been published on solder paste inspection, most making similar points. Why another? Perhaps because even today, many manufacturers still struggle to obtain significant yield improvements. Another is that, in most cases, the data are not sufficiently accurate or “clean” to offer meaningful interpretation and actionable results.

How can engineers avoid repeating mistakes and build a better product? It starts with the incoming substrate. PCBs are cleaned and are often vacuum-packaged or shrink-wrapped prior to shipment. Despite these efforts, dust and debris remain; they are the first step toward bad interconnects. Hair, solder mask particles, dust and other contaminants contribute to reduced quality. Then solder paste is printed. Numerous industry reports identify paste printing as the primary cause (60% or more) of SMT defects.¹ With up to 50 variables in the process, close tolerances can be difficult to maintain without real-time, accurate management of the process.

Pb-free processing raises the bar. The self-correcting effect when reflowing lead-based solder pastes is well documented. However, when the lead is removed, the wetting effect is altered.² Paste does not wet to itself as easily, and misprinted paste can often stay where printed. Offset can become a major issue in production. With the implementation of µBGA, CSPs, 0201 and 01005 components, pad sizes become smaller, and the process window narrows and requires greater control of solder paste volume, topography and print registration.^3,4

Last, thermomechanical fatigue (TMF) is the principal mechanism in field failures of electronics assemblies. Caused by the CTE mismatch between solder, substrate and component, repeated cycling eventually degrades the interconnect’s electrical and mechanical properties. TMF involves both cyclic (fatigue) and time-dependent (creep) behavior. Solder joint reliability is in inverse proportion to strain range, which is in inverse proportion to solder joint volume (Figure 1). Thus, a maximum solder paste volume within range is desired to ensure long-term interconnect reliability. This upper limit must be defined at design to guarantee the interconnect’s required electrical characteristics. As the size of the interconnect shrinks, the effect of TMF increases.


As one engineering manager said, “Screen printer defects occur randomly without a regular pattern. The defect rate of SMT will significantly decrease if real-time monitoring and maintenance of the screen printer operation were possible.” Paste printing characterization is critical to minimizing repetitive defects. Repetitive defects such as clogged or broken apertures, misprints, smear, etc., are often the result of improper or out-of-tolerance machine settings or deficiencies in the process, and at high production rates, will create large numbers of defects rapidly. Non-repetitive defects can be caused by substrate warpage, solder mask topography, poor wetting to surface finishes, and changes in solder paste viscosity. With so many factors in the paste printing process, accurate control must be maintained, and only then can we look at components, surface finishes and other potential external causes. Thus, it is critical to have an accurate, real-time picture of surface conditions after printing every pad on every substrate. To fully understand the issues, the reader is referred to the literature for information on feedback loops, solder paste surface topographies, machine repeatability and programming time.⁵

Phase Shift Interferometry

Using the phase shift interferometry technique, a structured light projects patterns such as grids, stripes, etc., onto an object. The surface shape is then obtained from anomalies in the pattern. A moiré pattern, as is used in this case, is a geometric design that results when a set of straight or curved lines is superposed onto another set. In this case, when a pattern of periodic fringes is projected onto the object, a CCD camera captures the projected image multiple times, which includes the data on the height of the object at each pixel (Figure 2). Multiple images result in a more robust data point. This results in a highly accurate 3-D image from which the system can extract the data necessary to compute the paste deposit volume and shape.


Benefits of moiré fringe technology include resolution, speed and the ability to withstand external factors such as noise and reflective angle. In this application, the benefits include much greater solder paste height resolution capability, robustness against changes in illumination, and the ability to accurately compensate for substrate warpage. In this way, the deposit’s authentic volume and shape, along with all other determinants, can be measured. Data can be processed in real time.

Feedback Mechanisms

Measurement precision and accuracy offer one tool, but production demands that inspection both identify defects and determine potential failure mechanisms in the process. Thus, x/y location of specific defects, squeegee direction, offset, component information and a graphical image of the defect map are necessary to assist the operator in qualifying defects and taking corrective action. Statistical data and defect analysis software can then show trends in either a single production lot, historical versus earlier runs of the same part number, or on a universal basis. A viable real-time feedback loop that gives the operator the data necessary to optimize the process is the goal. A useful GUI, trend histogram data and 2-D and 3-D images combine to reveal what is happening in the paste printer on every panel (Figures 3 and 4). Bridges, skips, dish downs, misprints, debris and slump should be easy to identify and locate. The defect reporting mechanism is critical.


Production experience shows that the initial implementation of 3-D SPI has a short but steep learning curve. After installation of the hardware, process characterization can show some disturbing results. Every defect is clearly visible, and in most cases, the user has never had a tool that accurately shows the topography and volume of every pad. These data are, however, extremely useful in paste printer optimization. Stencil designs can be examined, and cleaning frequency, squeegee speed, pressure and snapoff can be adjusted to help maintain optimal conditions.

Case Study – Automotive OEM

A large North American automotive electronics manufacturing plant performed an evaluation to determine the value of 3-D paste inspection. The product inspected  was multiple-up IPC Class B double-sided SMT panels, approximately 6" x 8" with approximately 1,000 components and 2,400 terminations. The smallest components were 0402 chip resistors and capacitors. Production volume was approximately 2,900 panels/day on the line running in 24/6 mode.

Programming/debug time on the assembly was approximately 15 min. Inspection cycle time was 24 sec., including substrate transport. Tolerance setting for volume was set at 70%/130% min./max.

With several test and inspection technologies already in place on the line, comparative analysis in yield improvement was correlated between 2-D inspection in the printer and post-reflow AOI. Impact on cycle time was also measured (Figure 5).


The primary defects found were bridges/smears and insufficient/no paste. The initial defect rate of up to 34,000 ppm (per AOI) was reduced, after paste printer adjustment, to less than 7,676 ppm.

Using the feedback tools of the paste inspection system, including 2-D/3-D viewer, x/y location and offset, squeegee direction, shape data, and volumetric data, operators were able to immediately recognize defects and take corrective action. An offset on all deposits, depending on stroke, was immediately noticed. One full day was devoted to paste printer optimization. Squeegee speed, squeegee pressure, stencil standoff and stencil cleaning cycles were adjusted. The overall reduction in AOI defects after optimization was 71.81%.

In addition, using a discrete 3-D paste inspection system, cycle times improved 34% versus in-printer inspection (Table 1). While not as important in high-mix/low-volume applications, gate speed is paramount in high-volume production.


Summary

Based on results of several installations, including the above referenced process characterization and optimization, significant data now exist supporting the use of 100% SPI. Because of the random nature of defects, sampling may not be advisable.

Yield improvement is rarely used to calculate the return on investment of inspection technologies because it has been difficult to prove. That said, the economic impact can be significant. A $100 million/year plant saves $1 million for every percentage point in yield enhancement.

Circuit complexity, reduced pad geometries on components such as µBGAs, CSPs and 01005 components, and yield improvement will drive further SPI implementation. Studies by a number of companies have characterized different volumes of solder deposits on either side of components as a primary cause of tombstoning. Based on field results, SPI represents a highly effective tool for yield improvement.

Ed.: Portions of this work were first presented at SMTAI in September 2005.

References

1. Bob Ries, “3-D Post-Printing Inspection,” Circuits Assembly, June 1998.
   
   
2. Amey Teredesai, Srinivasa Aravamudhan, Joe Belmonte and Richard Szymanowski “Self-Centering of Offset Chip Components in a Pb-free Assembly,” IPC/Jedec 5th International Conference on Lead-Free Electronic Components and Assemblies, March 2004.
   
   
3. Srinivasa Aravamudhan, Joe Belmonte, Gerald Pham-Van-Diep and Jeff Harrell, “Self-Centering of Chip Components in a Pb-free Assembly as a Function of Component and Solder Paste Print Offsets,” speedlinetech.com, September 2005.
   
   
4. Efrat Litman “Solder Paste Printing Inspection: An Inside Look,” SMT, January 2004.
   
   
5. Matthew T. Holzmann, “Process Control Through Volumetric Optical Inspection,” SMTA International, September 2005.

Matthew T. Holzmann is president of Christopher Associates Inc. (christopherweb.com); matt.holzmann@christopherweb.com.