Mobile phones are driving explosive WLP growth.

On the Forefront Wafer-level package (WLP) shipments have exceeded expectations, both in number of units shipped and device size. Once relegated to the few I/O range, WLPs with more than 100 I/Os routinely ship. Devices shipping in WLPs are expanding from integrated passives and analog devices to a variety of ICs, including RF. While many of the early parts were on 6" wafers, companies migrated from 8" wafers and are now designing on 12" wafers. Some will use wafers fabricated using low-k dielectrics. How large are today’s WLPs? And what difficulties will be encountered as WLPs expand?

WLPs (also called wafer-level CSPs) are fully packaged before dicing and do not typically use underfill for thermal stress management, but underfill is used by some companies to pass the drop test. Typically the ball or bump is a larger diameter and has a larger pitch than found in flip-chip bump applications. Increasingly, WLPs use a preformed solder ball.

WLPs are the package of choice for analog devices such as power amplifiers, battery management devices, MOSFETs, image sensors, controllers, memory and integrated passives. However, many companies plan to use WLPs for higher pin count applications, including analog parts with larger die sizes. This will increase the number of wafers to be processed, as well as the unit volumes. Table 1 shows current and forecast WLP trends.

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Fairchild, Vishay, and International Rectifier sell MOSFETs in WLPs. Integrated passives are supplied in WLPs by AVX, California Micro Devices (CMD), STMicroelectronics, On Semiconductor, NXP and others. Shinko Electric assembles power regulators and analog devices in WLPs. Ricoh supplies voltage regulators and detectors in WLPs. CMOS image sensors are packaged in WLPs by a variety of companies. Cambridge Silicon Radio (CSR) supplies many of its RF devices in WLPs. Fujitsu supplies power management devices in WLPs. Recent mobile phones such as Sharp’s SH904i contain one of Fujitsu’s power management devices in a 195 I/O WLP with 0.4 mm pitch. The die is 5.98 x 6.08 x 0.74 mm. Analog Devices, Intersil and National Semiconductor ship products in WLPs. National’s micro SMD package is used for an increasing number of analog devices such as voltage regulators, controllers and op amp devices. Devices with 200 bumps and finer pitch are in development. The high pin count parts are called micro SMDxt (for external technology to the micro SMD). Body sizes range from 0.78 x 0.78 mm to 5.5 x 5.5 mm, and lead counts range from four to 100 balls. While many DRAM makers planned to use WLPs for DDR3, few shipments have been made because wire bond technology on a laminate substrate (the FBGA) has thus far been sufficient to meet performance requirements.

Dialing up growth. WLPs can be found in applications such as cellphones and laptops, and consumer products such as watches, MP3 players, cameras and camcorders. Demand for greater functionality in smaller spaces is driving WLP adoption in cellphones faster than in any other market segment. Table 2 shows examples of WLPs found in Panasonic’s P902i mobile phone. Almost half the CSPs are WLPs. Motorola’s RAZR V3, the thinnest phone of its time, contains at least 14 WLPs. The WLP heights range from 0.27 to 0.5 mm, offering the lowest profile possible.1 Motorola has shipped more than 50 million RAZR mobile phones.

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Apple’s iPhone also uses WLPs, but these packages are not just for high-end phones. For example, the low-cost, high-volume mobile phones made in India for the domestic market contain many CSPs, including WLPs. The Nokia 2310 is a dual-band GSM 900, GSM 1800 phone. The phone is 105.4 x 43.9 x 19.05 mm, sells for $70, and contains five WLPs.

A new association. With higher I/O sizes, some companies are not able to use WLPs because the die area is too small to route the I/O. For this reason, fan-out versions of the WLP have been developed. Freescale Semiconductor’s RCP and Infineon’s eWLB are examples of this technology.

With the move to 12" wafers, there are concerns about capacity availability. Companies with 12" wafer level processing today include Amkor (Figure 1), ASE and Casio. TSMC has announced plans to spend almost $60 million to build a 12" WLP line, and others are expected to migrate to the larger wafer size. There are also concerns with handling and thinning for 12" wafers. New methods are under development.

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With the introduction of low-k dielectrics, companies will need to make careful selections of underfill materials so as not to induce increased stress. For some end-users there remains concern over handling this minimally packaged die, as it closely resembles a bare die. The WLCSP Forum (wlcspforum.org) has been formed to address these and other issues. Founding members include Amkor, CMD, Flip Chip International, Maxim Integrated Products, Nokia, and STMicroelectronics. Its mission is “to promote the adoption of semiconductor devices using WLCSP, to establish industry sponsored best practices for their utilization and to establish strategies for migration to finer pitch WLCSP products.”

The prospects are bright for the WLP, and cellphones will remain the driver for the future.

References

  1. TPSS Japan, “Analysis of Motorola RAZR V3,” December 2005.

E. Jan Vardaman is president of TechSearch International, Austin, TX; jan@TechSearchInc.com. Her column appears bimonthly.

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