What’s past isn’t prologue: A better understanding of contamination is needed.

The definition of board cleanliness is changing. It is not just the general visual or normalized number for the whole board we have understood it to be. Historically, it has been defined by total board cleanliness requirements of the military and IPC specifications of the 1970s. Board cleanliness has not evolved as assembly, interconnect, flux and component packaging have evolved. The difference between the historical definition of cleanliness and what is needed today is a direct understanding of what localized contamination is around critical sensitive circuits.

Historically, board cleanliness was:

• The visible appearance of surface residues (defined by IPC-A-610); shiny solder joints always looked better.
  
  
• The general ionic measurement of contamination from the entire board surface. Testing was conducted in an automated 1-5 gal. container of IPA and DI water recirculation over the board surface for 5-15 min. (normalized based on entire surface area of the board’s components), using a resistivity probe in solution and then creating a value of NaCl equivalence using a salt solution to establish a scale. Measuring the resistivity of this alcohol/water solution has provided a general understanding of the total board cleanliness and works as a process monitor for gross changes in the process.

What has changed that limits the effectiveness of this type of cleanliness testing? The primary changes can be answered by looking at four key areas:

• Increased circuit sensitivity with tighter spacing (small amount of contamination can shift the circuit output).
  
  
• Chemical changes in the fluxes (no high-solids rosin to seal in fabrication residues, but new, less insulative activators are used). Not cleaning after soldering but using low-solids fluxes (with weak organic acids), that are left on the assembly surface, which in turn leaves a different chemical residue that does not directly correlate to the historical response of fluxes.
  
  
• Integrated assembly techniques that were not just reflow or wave solder, but 2x reflow plus selective pallet wave soldering plus hand soldering plus localized brush cleaning, permitting pockets of residue in precise and critical areas due to secondary processing.
  
  
• The direct impact of bare board, component and secondary processing residues on circuit performance.

Localized cleanliness. To understand an assembly’s cleanliness requires a look at the effect of each process and nearby process, especially in critical circuit areas. The cleanliness of individual components, and spacing between leads on QFP, DIPS, QFN and connector leads, are areas for residues to impact performance. No-clean manufacturing techniques using selective wave techniques, dirty components, dirty bare boards, high levels of contamination on innerlayers, hand solder residues, residues nearby and areas around brush cleaning all rely on the understanding that these residues are benign.

Board cleanliness must represent the amount of residues detected in critical areas that correlates to electrical performance in the field and environmental stress screening. This approach as a process control technique must permit the assembler the opportunity to have failures (dirty boards) optimize the process, and then maintain this cleanliness level and not have field failures from qualified processes.

Terry Munson is with Foresite Inc. (residues.com); tm_foresite@residues.com. His column appears monthly.