Reprofiling may be the best containment method for head-on-pillow.

Head-on-pillow, ball-in-socket, ball-in-cup – whatever you call it, a defect by any other name still requires rework. In the past few months, reports of head-on-pillow (HOP) defects have increased dramatically. For those who have not yet experienced the HOP phenomenon, here’s a simple description:

• The solder paste deposit on the board melts and fuses in the reflow oven.
• The solder sphere on the BGA also melts in the reflow oven.
• The sphere material and solder deposit do not fuse to become one contiguous mass.

Typically, the reason they do not fuse is because one or both of the molten masses are covered with a thin but tough oxide film that prevents them from mingling. The oxide may be present on the surface of the spheres in their as-received condition, or it may be created in the oven.

As is typical with soldering issues, there are a number of contributing factors, so there’s no simple fix. But before investigating the root causes of the HOP defect, the savvy process engineer will make sure it really is a HOP defect. If HOP problems suddenly appear on an assembly line, the first step should be to check the sphere material. Many BGA component providers are switching their sphere material to alloys with lower silver content. This raises the melting temperature of the spheres to approximately 227°C. If the assembly process is running on the cool side – i.e., spiking in the 230°-235°C maximum temperature range – it is possible a change in sphere alloy is causing the strange shape of the BGA joints. From the outside, joints with low-Ag SAC spheres that do not collapse during reflow look strikingly similar to joints with the HOP defect: There is often a “waist” or elongation in the joint where the sphere meets the solder deposit above the pad.

The best way to differentiate between the HOP and low-Ag sphere alloy defect mode is by cross-section, but since that ruins the PWB, a more economical option is to check the components themselves. If they do turn out to be low-Ag alloy, a great deal of troubleshooting time has been saved, and the corrective action is clear: Increase the peak temperature and/or time above liquidus. If the sphere material is SAC 305 or 405 as expected, and the surfaces are solderable, then material-related root causes are ruled out, and reflow process investigations can begin.

A number of factors contribute to HOP defects, including:

• Higher surface area:volume ratios of both the solder deposits and the spheres. This ratio is an important factor in fine feature soldering because solder material surfaces exposed to air atmospheres oxidize readily, while the solder masses’ interior matters are more protected. As the size of a solder sphere decreases, the surface area:volume ratio increases. The smaller the solder sphere or paste deposit, the higher the surface area:volume ratio, and the greater the ratio of oxidizable-to-protected solder. As the solder oxidizes under reflow, it consumes flux, flux that will be needed to help aid in wetting when the metals reach liquidus.
  
  Although the assembler cannot change the BGA sphere size, they can change the solder deposit size. Increasing the stencil aperture diameter by as little as 0.001" will result in more solder on the board and a lower surface area:volume ratio for the paste deposit. At first glance, increasing aperture size may appear to be a risky endeavor that invites poor print quality and increased solder bridge defects, but it’s not as scary as it seems. Experience with SAC 305 solder pastes indicates they are less likely than SnPb pastes to form bridges and mid-chip balls. Our investigations into this phenomenon indicate it is a function of the alloy; the oxide film that forms on the surfaces of molten SAC 305 solder is more tenacious than its SnPb counterpart, which, unfortunately, works against us in the formation of HOP defects.
  
  
• The oxide film that forms on Pb-free solders during reflow is tougher to break through than similar films on SnPb solders. We have to take the good with the bad in Pb-free; that same property that gives us fewer solder bridges and mid-chip solder balls also gives us a higher propensity for HOP.
  
  There are two ways to systematically address the oxide film, but neither is a quick fix to an immediate assembly problem. Approach no. 1 is to turn on the nitrogen. If one wants to prevent oxides from forming in the reflow process, it’s a no-brainer to remove the oxygen from the process. That’s not an inexpensive option, however, and for some assemblers, it’s not an option at all. Approach no. 2 is to use a stronger flux – one that has higher activity or better thermal endurance. For most assemblers, this means qualifying a new material, which can be time-consuming and expensive. Couple that with the increased flux activity, which usually means decreased electrochemical reliability, and that thermal endurance is sometimes achieved by using halogenated materials in the flux, and both system-level fixes may rapidly become complicated or even totally impractical.
  
  
• Pb-free reflow processes provide more opportunity for package warpage. Thermal excursions run longer and hotter than they do in SnPb. There’s no way around it: The melting point of SAC 305 is nearly 35°C higher. If the same ramp rates were used in comparing SnPb and Pb-free profiles, the time to reach liquidus would be longer in the Pb-free process simply because of the alloy’s higher melting point. Additionally, Pb-free soak temperatures usually are 20-30°C hotter, and boards with poor thermal balance require longer soak times in Pb-free than they do in SnPb processes.
  
  All this additional thermal exposure can induce more warpage in BGA packages. As the package warps, the solder sphere can get lifted out of the paste deposit. When it is lifted out, more surfaces of both sphere and paste deposit are exposed to air, and more opportunity for oxidation occurs.

Pb-free soldering and miniaturized devices tighten the SMT process window when considered singularly. I think the reason for such a dramatic increase in HOP defects is the combination of those technologies brings together specific key factors to create the “perfect storm” for generating them: the higher surface area:volume ratios that create a higher proportion of oxide films, the films themselves that are tougher to penetrate or break through, and the reflow process that provides better opportunities to form them.

How do we address this? Larger paste deposits, stronger fluxes, inert environments – they all take time to implement. When defects become a plague, they can shut down an assembly line. The best immediate containment method I’m aware of is reprofiling. Reduce the pre-liquidus thermal exposure as much as possible by eliminating soak zones or accelerating ramp rates. Limiting the thermal exposure prior to reaching liquidus attacks the formation of oxide layers on all three fronts: Shorter time periods afford less time for the metals to form oxides and spend flux; they preserve flux activity for the liquidus zone where it is really needed to break those films and facilitate wetting, and they limit the warpage that exposes the ball bottom and paste deposit top to extra oxidation. If shortening the pre-liquidus time results in higher ΔTs, it’s up to the process engineer to determine where the tradeoff is between avoiding HOP defects and living with higher temperature differentials on any given product.

The more we solder with Pb-free materials, the more we understand the subtle narrowing of process windows that expose vulnerabilities in our systems. When we operate in areas where multiple window attenuations occur simultaneously, we should anticipate higher defect rates. Expecting a higher quantity of defects is the easy part; knowing which defects they will be and their corresponding root causes is where it gets tricky. Sometimes we can venture educated guesses with a modicum of accuracy; other times we just have to learn our lessons the hard way – by experience.

Chrys Shea is an R&D applications engineering manager at Cookson Electronics (cooksonelectronics.com); chrysshea@cooksonelectronics.com. Her column appears monthly.