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BERLIN, 14 September, 2017: Atotech, a global leader in chemical and equipment solutions for the printed circuit board and semiconductor industry, will present two technical papers at SMTA International Conference 2017, held in Rosemont, USA, on September 17-21.

The SMTA International is a leading and highly attended technical conference, including workshops and exhibitions. Atotech global experts will join this event and present the following papers at SMTA International technical conference:

  • Tuesday, September 19, 2:30 pm to 3:00 pm, “Substrates / PCB Technology Session”: “The impact of deposition thickness on high speed shear test result specifically related to electroless palladium and semi autocatalytic gold”
  • Thursday, September 21, 8:00 am to 8:30 am, “Advanced Packaging Technology Session”: “Fine line through hole copper filling in VCP for next generation packaging”

Sandra Heinemann, Product Manager Surface Finish at Atotech Deutschland GmbH, will present “The impact of deposition thickness on high speed shear test result specifically related to electroless palladium and semi autocatalytic gold”. In her presentation, Sandra will show the relationship between deposition thicknesses and solder joint embrittlement. High resolution microscopy was coupled with High Speed Shear (HSS) testing in order to filter out the attributes of the Intermetallic Compound (IMC) that are important for Solder Joint Reliability (SJR).

Olivier Mann, R&D Manager Electrolyte at Atotech Deutschland GmbH, will present on “Fine line through hole copper filling in VCP for next generation packaging”. Olivier offers a new solution for fine line pattern plating in mass production. In tests, the introduced through hole filling process using pattern plating technology in conveyorized systems showed its capability to fill common through hole quality for (a)mSAP production with 75 to 100 µm diameter and with 150 to 200 µm in substrate thickness. He also gives an outlook on latest developments for inclusion-free through hole at very low plated thickness in panel DC plating.

Following their presentations, both speakers will be available for questions and discussions with visitors and attendees.

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