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MANASSAS, VA – A recently published study on proper flip chip cleaning confirms an optimized cleaning process will ensure all flux residues from the die-attach process be removed from the narrow capillaries between the flip chip and the substrate.
 
Zestron, the study’s author, found the cleaning process has to be adapted to the low standoff of flip chip components, which is influenced by bump height. Other important factors affecting the cleaning process are bump pitch and array, as well as flux type and volume, wafer passivation, and the time prior to cleaning, the firm says.
 
Cleaned assemblies were subjected to long-term reliability tests to determine the achieved cleanliness level, Zestron says.

SAN JOSE, CA – Worldwide semiconductor sales in October rose to $23.1 billion, an increase of 5% year-over-year, and an increase of 2% sequentially, the Semiconductor Industry Association reported today.   Read more ...
BANNOCKBURN, IL – October rigid PCB shipments were down 0.8% and bookings were down 1.7% year-over-year, IPC said today. Flexible circuit shipments were down 8.6% and bookings were up 0.2% year-over-year.
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