News
ARMONK, NY – IBM this week claimed to be first to apply a self-assembling nanotechnology to conventional chip manufacturing. The company expects to have the technology ready for wide-scale use by 2009.
The natural pattern-creating process that forms seashells, snowflakes and enamel on teeth reportedly has been harnessed to form trillions of holes to create insulating vacuums around the miles of nano-scale wires packed next to each other inside each computer chip.
The new technique to make airgaps by self-assembly skips the masking and light-etching process. Instead, IBM scientists discovered a mix of compounds they pour onto a silicon wafer with wired chip patterns before baking it.
Compounds assemble in a directed manner, creating trillions of uniform, nano-scale holes across an entire 300 mm wafer. These holes are just 20 nm in diameter, up to five times smaller than those using today’s lithography technique.
Researchers have proven electrical signals on the chips can flow 35% faster, or the chips can consume 15% less energy compared to advanced chips using conventional techniques.
The self-assembly process has been integrated with IBM's manufacturing line in East Fishkill, NY, and is expected to be fully incorporated in IBM’s manufacturing lines and used in chips in 2009. The chips will be used in IBM's server product lines and thereafter for chips IBM builds for other companies.
The natural pattern-creating process that forms seashells, snowflakes and enamel on teeth reportedly has been harnessed to form trillions of holes to create insulating vacuums around the miles of nano-scale wires packed next to each other inside each computer chip.
The new technique to make airgaps by self-assembly skips the masking and light-etching process. Instead, IBM scientists discovered a mix of compounds they pour onto a silicon wafer with wired chip patterns before baking it.
Compounds assemble in a directed manner, creating trillions of uniform, nano-scale holes across an entire 300 mm wafer. These holes are just 20 nm in diameter, up to five times smaller than those using today’s lithography technique.
Researchers have proven electrical signals on the chips can flow 35% faster, or the chips can consume 15% less energy compared to advanced chips using conventional techniques.
The self-assembly process has been integrated with IBM's manufacturing line in East Fishkill, NY, and is expected to be fully incorporated in IBM’s manufacturing lines and used in chips in 2009. The chips will be used in IBM's server product lines and thereafter for chips IBM builds for other companies.
ATLANTA — Siemens Energy and Automation, Inc. this week appointed Dennis Sadlowski president and CEO. Sadlowski succeeds Aubert Martin, retiring after 40 years with Siemens.
Sadlowski started at SE&A in 2000 as a VP and GM in Atlanta. From 2003 to 2006, Sadlowski led the Siemens Automation and Drives Sensors business in Germany. In 2006, he returned to Atlanta as COO, while concurrently managing the Power Distribution & Controls Division.
BERKSHIRE, UK – A just-released NPL report describes developments using a surface insulation resistance test method to assess conformal coating protection performance on electronics assemblies.
In the report, authors Dr. Chris Hunt and L. Zou of the NPL maintain SIR is sensitive in detecting circuit reliability underneath coatings.
In the study, a test vehicle featuring a range of components was used to identify coating protection problems. The procedure on how to choose and apply contaminants to test coupons to simulate the contaminants effect from harsh environments on underlying circuit reliability is detailed, as well as the test parameter settings for SIR test and SO2 exposure testing. The method provides a measurement tool to discriminate between coatings.
The use of this method to investigate the protection performance of seven different types of coatings (two water-based acrylics, solvent-based acrylic, fluoroacrylate, silicone, polyurethane, and epoxy) against solvent-based flux, surfactant and SO2 gas, is included in the appendix.
For more information contact Hunt at chris.hunt@npl.co.uk.
In the report, authors Dr. Chris Hunt and L. Zou of the NPL maintain SIR is sensitive in detecting circuit reliability underneath coatings.
In the study, a test vehicle featuring a range of components was used to identify coating protection problems. The procedure on how to choose and apply contaminants to test coupons to simulate the contaminants effect from harsh environments on underlying circuit reliability is detailed, as well as the test parameter settings for SIR test and SO2 exposure testing. The method provides a measurement tool to discriminate between coatings.
The use of this method to investigate the protection performance of seven different types of coatings (two water-based acrylics, solvent-based acrylic, fluoroacrylate, silicone, polyurethane, and epoxy) against solvent-based flux, surfactant and SO2 gas, is included in the appendix.
For more information contact Hunt at chris.hunt@npl.co.uk.
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