News

AOI. The AOI was used to inspect boards pre- and post-reflow. Starting from the same CAD information, both programs were generated using the equipment manufacturer’s standard library. In the data presented below, the system was used to detect full and partial tombstones, and positional errors in X, Y and theta. For this test, the equipment was installed and calibrated by the manufacturer; a GR&R study was not performed prior to the execution of the experiment.

X-ray inspection. The x-ray was used to inspect for solder balls. PWBs were x-rayed, the resulting images visually interpreted, and the solder ball count manually recorded for each quadrant of the PWB. Solder ball defects were recorded for each PWB, but not uniquely associated with individual components.

Data Collection

Defects were classified as:

• Full tombstones, where the component stands completely up on one end at approximately a 90° angle to the PWB plane.
  
  
• Partial tombstones, also known as drawbridges, where the component is soldered at one termination but not at the other and stands at an angle between 0° and 90° to the PWB plane.
  
  
• Non-wets, where the component remains planar to the board surface, but solder has not adequately wetted to one or both of the terminations.
  
  
• Positional errors, in which one or both component terminations are offset from the pad edge by more than 50% of the termination width in X, Y or theta.
  
  
• Solder balls, or spheres of solder that remain after soldering. The minimum size recorded was that which was visually perceptible on x-ray images, approximately 75 to 100 µm (0.003"-0.004") in diameter. Workmanship criteria such as locations relative to the components or levels of encapsulation were not recorded.

Examples of the defect modes are depicted in Appendix A.

Results and Discussion – Phase I Data

Defect overview. Defect rates for six specific failure modes were recorded. The overall defect rate for the experiment was 11,823 ppm. The defects breakdown is shown in Figure 9.

Solder balls were the most commonly observed phenomenon, but it should be noted that although they are all reported as defects in this study, not all solder balls observed would necessarily represent defects in a production environment. Some would be considered defects; others would not. For example, solder balls larger than the minimum spacing of the surface-mount leads and not entrapped or encapsulated enough (by no-clean flux residue) to prevent dislodging in their service environments would be considered defects. Solder balls that do not violate minimum spacing requirements or those judged to be adequately entrapped would not. Inspection criteria vary by product, but in general, solder ball formation is indicative of coalescence properties during reflow. Because solder balls showed such a considerable response in the experiment, but workmanship standards vary widely, defect rates are reported with and without the inclusion of solder balls. When reviewing the results, solder balls should not be considered as absolute defects, but as relative indicators of coalescence.

Positional errors in the X and Y directions were observed with the same frequency as solder balls. The other failure modes observed (in order of declining frequency) were non-wets, full tombstones and partial tombstones. Although these five failure modes were differentiated for the purposes of this investigation, from a production perspective they share a common characteristic: They all require rework.

Tombstone formation was the focus of the study; the data were statistically analyzed for the input variables’ effect(s) on tombstoning rates. The top four contributors to tombstoning included three main effects and one interaction. The interaction between paste offset in the X direction and placement offset (in both X and Y) had the largest overall effect on tombstoning rates. When the effects of paste and placement offsets were removed, the overall defect rate dropped from 11,823 ppm to 2,513 ppm including the solder balls, or from 7,845 ppm to 156 ppm excluding the solder balls (Figure 10).

It is clear that eliminating unnecessary offsets in printing and placement removes an enormous source of defect generation, not only for tombstones but all defect modes. The placement offsets used in this study were representative of conditions commonly found in an out-of-control production environment. The 0.1 mm (0.004") offset on placement coordinates is considered to be within the actual placement capability of many high-speed chip placement machines. Although the paste offset of 0.1 mm (0.004") is larger than the typical positional error on most stencil printers, the source of PWB-stencil misregistration is typically not a result of the equipment, but of either poor setup or alignment issues created by dimensional inaccuracy of the PWB or stencil.

• Prev
• Next