BANGALORE, Dec. 20 - Cookson Electronics Assembly Materials has opened a research center in India, making its the first electronics assembly materials company to do so, the company said today.

The opening of the center on the campus of the Indian Institute of Science in Bangalore brings to four the number of R&D labs Cookson operates worldwide located. The others are in the U.S., the U.K. and Japan.

"Cookson Electronics remain[s] steadfastly committed to serving our customers in the fast growing Asia/Pacific region where we have experienced double-digit growth over the past five years with no slowdown in sight," said David Zerfoss, president of Cookson Electronics Assembly Materials, in a statement.

The new center, a collaboration with the Indian Institute of Science, employs eight doctorates among its staff.

SAN JOSE, Dec. 22 -- Third quarter EDA revenues fell 2% from last year to $953 million, according to the latest statistics from the Electronic Design Automation Consortium.

License and maintenance revenue, the largest revenue category, declined 3%. North America les the way down, with all major categories off vs. last year.

"Despite a weak third quarter, the EDA market has shown a 3% growth rate on a year-to-date basis," said Wally Rhines, EDAC chairman.

The largest tool category, computer-aided engineering, was flat with sales of $453 million. IC physical design and verification revenue was down 9% to $272 million.

Revenue for PCB and MCM layout tools totaled $81 million in Q3, down 1%. Services revenue was $66 million, up 5%.

Semiconductor intellectual property revenue rose 8%, to $81 million.

North American revenues fell 9% to $472 million. Europe's revenues rose 4% to $192 million, as did Japan's ($183 million). Double-digit growth continued in the rest of the world, which showed total revenues of $107 million, up 11%.

Employment rose 4%, to 20,500 professionals, the third straight quarter of new highs in employment.

STAMFORD, CT, Dec. 16 — Worldwide semiconductor capital equipment spending is on pace to grow 61% in 2004, but next year's spending is projected to drop 15, according to Gartner Inc.

"The emergence of excess inventories, macroeconomic uncertainty and slowing end-user demand casts a shadow over the outlook for 2005," said Klaus Rinnen, vice president for Gartner's semiconductor manufacturing and design research group. "Device production has slowed in recent months, and with it semiconductor manufacturers have readjusted their capacity ramp-up and equipment purchase plans."

All major segments of the capital equipment market are forecast to decline in 2005 except for the automated test equipment market, which is expected to grow 3%, followed by a 30% drop in 2006. Gartner analysts said the industry is in a downcycle, but this period will be shorter than the prior one in 2001.

"Given more modest-capacity investments during the cycle, the supply-demand imbalance will be far less severe than in the prior two cycles," Rinnen said. "Consequently, the approaching downcycle will be mild, allowing for a return to positive annual investment growth possibly as early as 2006."

Worldwide semiconductor wafer fab utilization rates peaked in the second quarter at 94.9% before dropping to 91.3% at the end of the third quarter, as semiconductor manufacturers trimmed production levels in response to excess inventories.

"By the middle of 2004, capacity caught up with demand, and excess capacity started to emerge," Rinnen said. "However, any excess capacity during this down period will be considerably less than in prior downward cycles, and utilization rates will decline only to about 85% before starting a gradual increase through 2006."

The packaging and assembly equipment market will fall 22% in 2005, to about $3.5 billion. Growth will be limited to packaging lithography and flip-chip bonder tooling. Packaging utilization rates will likely bottom out in the second half of 2005, giving way to a pickup in orders by the end of the year or very early in 2006.

Gartner analysts said the automated test equipment market will experience a slight increase due to the continued growth of test outsourcing, and the remaining strength of semiconductor assembly and test services providers.

FRANKLIN, MA, Dec. 21 - Leading experts will explore SMT process challenges in a new series of free technical webcasts kicking off in January.

The events are sponsored by Speedline Technologies and are open to qualified individuals who register through the company's Web site.

"Speedline has designed these seminars to explore and deliver the in-depth information and how-to insight to help process engineers manage and control the major issues and challenges they will face daily throughout 2005," said Pierre de Villemejane, Speedline's president.

Each of the one-hour seminars will explore one of these challenges in a major manufacturing process - including lead-free wave and reflow, fine-pitch printing and underfill dispensing.

Hosted by experts who have been developing and implementing manufacturing techniques for more than 20 years, the sessions will include discussions of manufacturing floor challenges, new technologies, how-to implementation information and question-and-answer periods. Seminars begin at 11 a.m. Eastern.

• Jan. 19: Statistical Process Control & Design of Experiments
• Feb. 17: Lead-Free Overview
• Mar. 17: Lead-Free Wave Soldering
• Apr. 14: Lead-Free Reflow Soldering
• May 17: Lead-Free Reflow Soldering Power and Nitrogen Consumption
• Jun. 16: Underfill Dispensing
• July 21: Fine Pitch Printing
• Aug. 18: Lead-Free Overview
• Sept. 15: Lead-Free Wave Soldering
• Oct. 20: Lead-Free Reflow Soldering
• Nov. 17: Tin Whiskers
• Dec. 15: Fine Pitch Printing.

To register visit www.speedlinetech.com/seminars or call 508-541-4749.