What you don’t test can hurt you.

One of the most important steps in printed circuit board production is testing. If PCBs aren’t tested, errors and defects missed during the manufacturing process could eventually lead to malfunctions and product failures in the field. After a PCB board is manufactured and assembled, it is tested to ensure no shorts or opens are in the PCB circuitry. All components must be verified for the correct values per the design, proper orientation, and be free of faults (or dead). Inspecting the solder quality of through-hole (PTH) connector leads, large surface-mount technology (SMT) ICs and the balls of a ball grid array (BGA) package can be difficult with standard inspection tools and methods. These verification processes are highly challenging and require a full understanding of the design scope of ECAD tools and the mechanical capabilities of the testing equipment.

Figure 1. Test point placement: (left) measuring the distance to the end edge of the component pad/body; (right) measuring the distance to the side edge of the component pad/body.

Many inspection procedures and tests ensure the integrity of the manufactured PCB. These include the following methods and technologies:

• Automated optical inspection (AOI)
• X-ray inspection (2-D/3-D)
• Flying probe test
• In-circuit test (ICT)
• Burn-in test
• Functional test.

Here we discuss and compare ICT and flying probe test systems and their scopes. These two systems work with different approaches, but when combined, they can thoroughly test a PCB. Let’s look a little more closely at them.

In-Circuit Test

Among PCB testing methods, ICT is the most reliable. Fabricators deploy this method in the manufacturing environment where PCBs must be thoroughly inspected before they are ready to leave the production floor. The intent is to make sure no assembly errors were made during the soldering process – either on the board or when installing components. Manufacturers often use ICT for testing in high-volume environments.

In ICT testing, the circuit nodes are accessed with the help of a “bed-of-nails” fixture. For 100% coverage, each net in the PCB layout should have a test point (TP) accessible to the corresponding unique probe in the bed-of-nails fixture. An electrical circuit’s test point is a place where test signals or circuits can be accessed or where the circuitry’s condition can be monitored. The number of pins or “nails” in the fixture must be exactly equal to the number of test points that the designer could put on the nets. So, a test fixture may contain thousands of probes, depending on the number of nets in a PCB. These test points (TPs) are tested not only for continuity and electrical characteristics such as resistance, voltage levels, signal strength and more, but also for assembly defects as and board functionality.

Typically, designers are asked to add TPs on the bottom side of the PCB to keep the straightforward relationship of “one fixture for one PCB,” but sometimes it is not possible to add TPs on all nets on the bottom side, so they are added to the topside of the board to get higher test coverage of the nets. Hence, ICT fixtures are custom-built for both the top and bottom sides of the PCB. Remember, a test fixture is always custom-built for each PCBA to be tested.

These test fixtures utilize design data extracted from CAD tools. Since, naturally, all the probes in the text fixture touch their corresponding or respective test points on the PCB on both sides at the same time, ICT systems are normally much faster than other types of testers. Although the initial cost of producing a fixture is very high, it can be recovered in high-volume testing scenarios.

PCB layout designers should recognize that ICT fixtures are expensive – sometimes in the tens of thousands of dollars – and unique for each PCB. Any revisions of the layout causing a change in the location of the test points will require changes in the test fixture – an expensive proposition. Often, revisions end up requiring a new test fixture. Thus, one take caution and be mindful about these associated factors and realities (Table 1).

Table 1. Pros and Cons of In-Circuit Testing

Other factors that contribute to the cost include the size of the board and the fixtures. An ICT system activates and powers up each circuit on the board, hence the reference to a bed-of-nails test. Although the test is typically intended to cover 100% of the nets, in practice it’s closer to 85–90% coverage. One positive about ICT is there is no human error involved in those results.

Flying Probe Test

In contrast to ICT, with test fixtures with probes numbering in the thousands, flying probe testing (FPT) has only two to six probes for the same PCB. The FPT system is programmed using data extracted from the CAD file, which then controls the movement of these probes around the PCBA to contact test points on the top and bottom of the board. Thus, a test fixture isn’t needed here because the system moves the probes to the specified test point locations.

FPT has several advantages over ICT, particularly in terms of cost and setup time. This method is especially beneficial when handling multiple revisions of the same PCBA because it eliminates the need to manufacture a new test fixture for each iteration. Instead, only the programming needs to be updated based on the new output from the CAD data. Additionally, FPT can handle larger PCBs. Since the number of probes is comparatively small in FPT, for larger boards, it takes longer to cover and access all the test points on the PCB. As a result, FPT is not the choice for large, complex boards with high-volume production runs.

Table 2. Pros and Cons of Flying Probe Testing

On the other hand, it is decidedly feasible for prototype designs and PCBs with small numbers of nets. Due to its smaller number of probes, it is typically used to look for assembly defects instead of FPT for functional and other sophisticated testing. This is basically an established method that is less expensive than ICT. This kind of test is non-powered, and looks for the following, generally:

• Opens
• Shorts
• Resistance
• Capacitance
• Inductance
• Diode issues.

Test Point DfM Rules

To create the most economical test fixture, keep test points on one side of the board. Localized strain decreases through evenly distributing test points because they distribute the fixture probe force over the board. Although an option, test points on both sides of the board raise test fixture cost.

Test point to test point distance. The minimum center-of-test-point to center-of-test-point spacing should be 0.050" (1.27mm) (Table 3). Make the most of the wider TP-to-TP distance. This makes it possible to employ bigger test probes, which are more durable, less costly and less likely to wear out. Note: Test point spacing is measured from center of test point to center of test point.

Table 3. Test Point to Test Point Spacing

Test point under BGA. Test points placed under BGAs should be kept to a minimum. As rules of thumb, maintain a maximum 100 test points per square inch (25.4mm) for boards <=0.075" (1.905mm) thick, and maximum 150 test points per square inch (25.4mm) for boards >0.075" (1.9050mm) thick. This helps ensure the strain levels on BGA corners do not damage the solder joints or component. To minimize test points under the BGA, consider routing test points from under the BGA to outside its perimeter so that the BGA can be better supported.

Test point size. The minimum test point diameter is 0.025" (0.635mm) (Table 4). Test points with a 0.040" (1.016mm) diameter offer the most consistent and dependable contact. If test points smaller than 0.035" (0.889mm) are used, special tooling might be needed, which increases fixture costs.

Table 4. Test Point Size

Spacing test point to board edge. Maintain a minimum clearance of 0.125" (3.175mm) from the edge of test point to a conveyed edge of board, or 0.050" (1.27mm) from the edge of test point to a non-conveyed board edge, on both the primary and secondary sides. Use of automated board handlers in testing may require more clearance, depending on the equipment used. Any violation may cause probing issues or false readings.

Spacing test point to NPTH. Maintain a minimum clearance of 0.050" (1.2700mm) from the edge of the test point to the edge of the non-plated through-hole (NPTH) on both primary and secondary sides of the board. Any hardware items (screw head, washer, etc.) to be mounted in the NPTH hole may overlap with the test point and cause probing issues or damage the test probe itself.

Table 5. Test Point Spacing, by Component Type

Spacing test point to component. Ensure components are arranged differently and don’t obstruct test points. If the distance is less than required, there may be problems with the test fixture, malfunctioning parts or test contact concerns. Any hardware items (screw head, washer, etc.) to be mounted in the NPTH may overlap with the test point and cause probing issues or damage the test probe itself.

Akber Roy is chief executive of Rush PCB, a printed circuit design, fabrication and assembly company; roy@rushpcb.com.

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