CircuitSpace v2.2 permits bi-directional communication between layout and a PDF schematic. Is said to provide instant selection and verification of design elements such as components, nets or pins, within Cadence Allegro and schematic. Cross-probing permits populating any selection set through interactive clustering. Is said to reduce board layout and placement time to minutes with AutoClustering, design reuse, and cross-probing. Features concurrent layout development project wide; template generation for global library usage across divisions; template usage with and without etch; automated layout reference designator propagation; advanced sustaining engineering and ECO process; automated change report between layout designs and availability.