XJFlash module automatically generates custom programming to overcome speed limitations generally associated with using boundary scan to program flash memories connected to FPGAs. Relieves JTAG chain of unnecessary traffic (usually generated by repetitive functions such as shifting in control, address and data bits). By doing so, programming speeds close to the device’s theoretical maximum can be achieved. Supports a range of flash and FGPA configurations, and can now be used as part of an XJDeveloper boundary scan test project to create a programming solution. Reportedly erases, programs and verifies any flash memory provided there is access to it from an FPGA on the target board, all within the XJTAG software.

XJTAG, www.xjtag.com

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