Circuits Assembly Online Magazine - New Products

News

Rolling Meadows, IL- BEST Inc., in conjunction with Cookson Electronics Assembly Materials and Automated Learning Corp. (ALC), announce the launch of their "Lead Free Rework " assembly training course. This interactive multimedia learning course is designed for rework technicians, process engineers and repair depot technicians and their respective managers who are involved in the rework of lead-free electronic assemblies.

The course teaches key concepts through presentation, practice and testing of the material. Learning takes place at any time or place that is conducive for the student, with a final interactive test for certification of the concepts learned in the program. The course can be conducted over a company LAN or through the internet. Translated versions will be offered in German and Chinese.

Minneapolis, MN -- Dr. Bruce McWilliams, chairman and CEO of Tessera Technologies, will present the keynote speech at the International Wafer-Level Packaging Conference, Nov. 3-4, at the San Jose DoubleTree Hotel, CA. The keynote, "Why Wafer-Level? Its Promise and its Future", will be given at a special dinner on November 3.

He will explore the universe of semiconductors and semiconductor packaging technologies and look at the promise offered by wafer-level packaging, including "killer" applications that will propel growth and the technical hurdles that must be overcome.

Dr. McWilliams joined Tessera in 1999 as president and CEO. He became chairman in February 2002. He had previously served as president and CEO of S-Vision Inc., a silicon-chip-based display company that he co-founded. He was also a senior vice president at Flextronics International Ltd.

The event features an exhibition of suppliers to the semiconductor packaging and testing industry, and the technical program explores semiconductor packaging, including chip scale packaging, 3-D packaging, system-in-package, system-on-chip, system-on-package and wafer-level packaging.

For more info: smta.org/iwlpc/

SAN JOSE - Worldwide semiconductor manufacturing equipment billings reached $9.4 billion in the first quarter, according to the industry trade group SEMI, up 2.3% from a year ago and 6.5% sequentially. Bookings ($7.25 billion) were down 21% from a year ago and 12% from the fourth quarter.

The data, collected in concert with the Semiconductor Equipment Association of Japan, come from more than 150 equipment companies.

"The first quarter billings showed some positive momentum over the fourth quarter of last year, while worldwide bookings for semiconductor manufacturing equipment are down for the same period," said Stanley T. Myers, president and CEO of SEMI.

Billings in Korea were up significantly sequentially, Myers said.

HERNDON, VA - The International Electronics Manufacturing Initiative (iNEMI) is sponsoring a workshop on tin whiskers as part of IEEE's Electronic Components and Technology Conference on May 31-June 3, in Lake Buena Vista, FL. iNEMI will present the results of its third set of whisker experiments, , which provide additional insight into tin whisker formation and growth.

Presentations will also cover the latest theories regarding the cause and effect of stress formation in tin film, the mechanism by which material moves through the structure, and the causes of whisker growth. In addition, a recently discovered factor in tin whisker generation will be discussed - heavy oxidation or "corrosion" of the tin in humid environments. Data on testing and the impact of oxidation on whisker growth will be covered.

Dr. Henning Leidecker, NASA, will serve as moderator for the workshop. The event is chaired by Ron Gedney, iNEMI consultant, and Maureen Williams, NIST. For a complete agenda:
http://www.inemi.org/cms/calendar/tin_whisker_workshop.html.

In addition to the iNEMI workshop, the ECTC technical program includes a session on solder and tin whiskers (Session #10, Materials & Processing Committee) on June 1.
Online registration is available at
https://www.ec-central.org/conference/ectc/55/doorregistrationform.cfm.

Rochester, NY - EMA Design Automation, a provider of electronic design automation (EDA) solutions, and PartMiner Inc., a provider of electronic components and information services for the electronics industry, announced a partnership to bring together Cadence Design System Inc.'s design technology and PartMiner's CAPS electronic component database.

PartMiner provides a range of services for researching, selecting, locating and procuring electronic components. As part of the partnership, these capabilities are integrated into OrCAD Capture CIS, giving users access to over 47 million components from over 1,900 manufacturers for parametric searching and part validation. This enables part validation at the initial stages of the design cycle and allows life cycle status, such as product change notifications, end of life and RoHS status issues, to be solved at the database level.

"We have a unique method of integrating OrCAD Capture CIS with PartMiner, giving the design engineer immediate access to a content rich environment," said Manny Marcano, president of EMA. "This electronic interface provides instant productivity by the addition of relevant component data into the OrCAD Component Information System (CIS) at the engineer's desktop - RoHS data at the design point. This provides information to the right person at the right time to make the best decision possible."

HORSHAM, PA - Avo Photonics, specialists in RF and optical packaging solutions, has developed a lead-free TEC-to-Package process. The process works for high-quality, high-performance applications, while meeting regulations requiring lead-free electronics components. The process has been qualified and can be used for volume production of assemblies.

The process caters to markets requiring high-end thermoelectric cooler (TEC) packages, used in a variety of telecommunications, medical and military applications (such as lasers, temperature-controlled etalons, high-speed detectors and temperature reference sources).

The TEC-to-Package process includes solder bonding the TEC within a non-oxidizing inert gas environment leading to void-free coverage. Said to result in excellent thermal conductivity across the interface and very rugged bond strengths. Includes surface acoustic microscopy (SAM) testing to verify void-free results. For TECs without wirebond posts, Avo trims, forms and simultaneously reflows the solder to bond the TEC leads to the package within the TEC packaging process.