ARLINGTON, VA – JEDEC Solid State Technology Association published a revised standard that establishes requirements for the next generation of semiconductor device package components: JESD30G.  

Developed by JEDEC’s JC-11 Committee for Mechanical Standardization, the standard is based on a language used to describe the geometric aspect of the components used for semiconductor package development.  

This standard provides the opportunity to unify toward a single defining structure for components by adhering to a comprehensive definition based on geometric data, says JEDEC. This approach defines components in the market, including scalability to support emerging and future semiconductor packages. This methodology defines the components in detail to enable process efficiencies throughout the product development process – from design, purchasing, manufacturing, test, and the entire product lifecycle. Additional definitions and clarifications of the device are available in this release.

“These clearly defined requirements will eliminate duplicate or varying component definitions by using a geometric description to establish this industry standard,” said John Kelly, JEDEC president.  

“This comprehensive language will scale with the constant emergence of new packages, benefiting the electronic industry by eliminating confusion and improving collaboration,” said A.J. Incorvaia, vice president of Mentor Graphics Systems Design Division.

A webinar on this new standard, co-presented by John Norton, Hewlett-Packard (Chairman of JC-11), and Michael Durkan, Mentor Graphics (a key author of the new standard), will be held Feb. 23.

To register, visit https://www.mentor.com/pcb/events/understanding-the-requirements-in-jesd30g-for-semiconductor-device-packages.

JESD30G is available for free download from the JEDEC website.

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