caLogo

ARLINGTON, VA – The JEDEC Solid State Technology Association established JEP181, a neutral file, XML-based standard for electronics cooling simulation for the microelectronics industry.

JEP181 simplifies exchange of simulation data for thermal digital twins of electronic devices and simplifies thermal model data sharing between suppliers and end-users in a format called ECXML (Electronics Cooling eXtensible Markup Language).

With this universal thermal model sharing standard, electronics manufacturers reportedly can reduce the time required to simulate and validate thermal models.

“The JEP181 standard from JEDEC benefits thermal design engineers by providing wider availability of the key data necessary to validate the thermal performance of today’s advanced designs,” said Ghislain Kaiser, senior director, Intel Corp. “This standardized format will allow more interoperability between engineering teams, leading to substantial time and cost savings by removing design barriers previously common in thermal engineering.”

JEP181 is ideal for emerging technologies and trends such as miniaturization, 2.5-D and 3-D semiconductor packaging, and 5G technology.

“As a leader in industrial software solutions, our contribution to the new JEP181 standard can help drive the digitalization of design data to reduce both time and errors for today’s innovative electronics products,” said Jean-Claude Ercolanelli, senior vice president of Simulation and Test Solutions, Siemens Digital Industries Software. “Enabling a seamless digitalized software flow can radically increase the efficiency and accuracy of thermal simulation and thus enhance the performance and reliability of digital twin prototypes and manufactured products.”

For more information, visit https://www.jedec.org/standards-documents/docs/jep181.

Submit to FacebookSubmit to Google PlusSubmit to TwitterSubmit to LinkedInPrint Article
Don't have an account yet? Register Now!

Sign in to your account