Does artificial intelligence make you concerned for your job? Are humans at imminent risk of being replaced by robots, or even software-driven functions?
Kyle Miller says no and no.
Miller is head of a team of product developers at Zuken in Bristol, England, that is working on AI-based place-and-route technology. In addition to the 20-plus years spent in CAD tools, he has a doctorate in artificial intelligence, which means he’s a lot better at math than me or you.
Speaking at Zuken Innovation World in mid-April, Miller outlined the headway Zuken is making in machine-learning tools. The short answer: quite a bit. Machine learning-based programs are very good at pattern recognition and converting data into usable forms. Everyday uses include Google’s Android-based speech-to-text tools. ML is also apparently superior in finding and exploiting bugs in software, to the extent the developers of the space-flight simulation role-playing game known as Elite Dangerous had to eliminate the function after their game’s ML exploited a glitch to create an unstoppable weapon.
Our Jan. 27 newsletter spoke about a decline from Taiwanese PWB manufacturers: “The barometer for the Taiwanese electronics industry is falling – signaling bad weather ahead.”
If your designer certification were suddenly rendered invalid, would you feel any less professional? Would you feel any less knowledgeable about your craft?
Those questions are at the root of an ongoing debate between IPC and the Designer’s Council Executive Board. The two parties have been at odds over the past several months due to a difference in opinion over the nature of the certification program.
Designer certification as a formality dates back to 1994. A group of industry professionals, along with the late Dieter Bergman, then IPC technical director, devised the original template. (Disclosure: I was the IPC staff liaison for design and was present at all the meetings where the program was drafted.) A consulting firm we’d hired advised us to use a consensus body of knowledge such as a standard as the foundation for the exam, as it would leave us less exposed to litigation from someone who might have failed the test. Thus, we wrote hundreds of questions for a test based on IPC-D-275, the prevailing design standard of the time, but steeped in good design practice. And we developed a multi-day workshop to prepare designers for it.
Surface roughness can increase electric field strength and capacitance.
Conductor surface roughness directly interferes with conduction in high-frequency circuits. How is this? Surface conductivity (or RF resistivity) of a metal film is a function of frequency, as conduction decreases exponentially from the surface into the film. But it’s a Catch-22; the “roughness rule” states the rougher the interface between metal and substrate, the better the adhesion, but the higher the attenuation.
Scientists have long studied the effect of grooves present on the surface of a conductor, having noted the additional losses through the conductors caused by them. In worst-case scenarios, the grooves cause losses that sometimes reach a factor of two. The explanation proposed was electromagnetic (EM) waves travel mostly along the surface of a conductor; e.g., the copper signal trace. The grooves effectively cause the signal paths to become longer, as the EM waves, while traveling along the surface, enter in and then exit from the grooved shapes.
Accommodating for warped boards.
The current consumer electronics manufacturing climate, which dictates thinner boards and stencils, component placements right to the very edge and panelized assemblies with a significant amount of routing, makes it increasingly challenging to ensure board flatness and coplanarity for a good stencil printing outcome. But, as you know from reading this column regularly, one fact is nonnegotiable: Good printing results require a tight stencil-to-board gasket across the whole of the panel. (See “For Successful Printing, Don’t Blow the Gasket,” October 2018.) This requires the PCB to be flat.
Board warpage – or bow and twist, as I like to refer to it – has always been a key consideration for stencil printing. However, in the past, the 2mm-thick boards being processed were more likely to arrive from the fabricator flat and remain that way through topside printing, reflow and bottom-side printing. The occasional bowed panel was easy to rectify with over-the-top clamps and a good tooling vacuum. Today, however, as consumer PCBs have become thinner, with more routing (interspace) around the supporting panel, warpage is a far more common and vexing issue. Smaller, higher-functioning consumer products have moved us toward 0.6mm-thick boards and stencils as thin as 80µm (and thinner). This combination of factors is making PCB bow and twist increasingly likely and its traditional remedy less than ideal in isolation. Any interspace created during the printing process introduces the opportunity for defects not only with board-to-board repeatability, but also within the panelized PCB from corner-to-corner and side-to-side.