News
FRAMINGHAM, MA – Worldwide PC shipments grew by 15.5% in the third quarter, according to IDC.
SAN JOSE, CA – Jan Vardaman, president of TechSearch International Inc., will keynote the annual MicroElectronics Packaging and Test Engineering Council technical symposium in San Jose on Nov. 8.
In her keynote presentation, Markets and Trends in Laminate Substrates, Vardaman will present findings of the SEMI/TechSearch International Global Semiconductor Packaging Materials Outlook and provide insight into trends driving substrate developments, trends in feature size, and materials, including production capacity considerations and pricing trends.
Vardaman is the founder of TechSearch International, and the coauthor of How to Make IC Packages (published in Japanese), a columnist with Circuits Assembly, and author of numerous publications on emerging trends in semiconductor packaging and assembly.
In addition to the keynote presentation, the program has been segmented into the following focus sessions: Substrate Manufacturing and 1st Level Interconnect Technology; Design and Simulation: Silicon, Substrate, System; 2nd Level Interconnect and Reliability, and Emerging Substrate Technologies.
To register, visit www.meptec.org.
In her keynote presentation, Markets and Trends in Laminate Substrates, Vardaman will present findings of the SEMI/TechSearch International Global Semiconductor Packaging Materials Outlook and provide insight into trends driving substrate developments, trends in feature size, and materials, including production capacity considerations and pricing trends.
Vardaman is the founder of TechSearch International, and the coauthor of How to Make IC Packages (published in Japanese), a columnist with Circuits Assembly, and author of numerous publications on emerging trends in semiconductor packaging and assembly.
In addition to the keynote presentation, the program has been segmented into the following focus sessions: Substrate Manufacturing and 1st Level Interconnect Technology; Design and Simulation: Silicon, Substrate, System; 2nd Level Interconnect and Reliability, and Emerging Substrate Technologies.
To register, visit www.meptec.org.
EL SEGUNDO, CA – To say that Japanese OEMs have been shy about using contract manufacturing services could be the understatement of the year, says iSuppli Corp.
WELLESLEY, MA – The world market for mobile telematics was worth some $37.5 billion in 2006, a figure expected to reach $52 billion in 2012, a CAGR of 3.5% over the next five years, according to BCC Research.
The market includes applications of automotive, intelligent transportation systems (road installations and operations centers), aircraft, railroads, construction, agriculture and maritime technologies. Of these sectors, automotive accounts for the largest share of the market and is expected to reach more than $48 billion in 2012, at a 3.6% CAGR, says BCC. Growth in automotive telematics will be driven by government-mandated use of safety equipment.
Intelligent transport systems (road installations) currently have the second largest share of the market at $649 million, projected to reach more than $1.8 billion by 2012, a CAGR of 17.9%, according to BCC. However, intelligent transport systems (operations centers), now worth $375 million, will be worth $2 billion by 2012, a CAGR of 31.7%. The increasing sale of public roadways to private owners will speed the introduction of intelligent transport systems, with a corresponding rise in the need for mobile telematics components.
The market includes applications of automotive, intelligent transportation systems (road installations and operations centers), aircraft, railroads, construction, agriculture and maritime technologies. Of these sectors, automotive accounts for the largest share of the market and is expected to reach more than $48 billion in 2012, at a 3.6% CAGR, says BCC. Growth in automotive telematics will be driven by government-mandated use of safety equipment.
Intelligent transport systems (road installations) currently have the second largest share of the market at $649 million, projected to reach more than $1.8 billion by 2012, a CAGR of 17.9%, according to BCC. However, intelligent transport systems (operations centers), now worth $375 million, will be worth $2 billion by 2012, a CAGR of 31.7%. The increasing sale of public roadways to private owners will speed the introduction of intelligent transport systems, with a corresponding rise in the need for mobile telematics components.
LEUVEN, BELGIUM – IMEC and the Microsystems Packaging Research Center at the Georgia Institute of Technology invite interested parties to join a research program on next-generation flip-chip and substrate technology. The program addresses key IC-to-package to board packaging interconnect issues for 32 nm ICs and beyond.
IMEC and Georgia Tech will explore, develop and invent solutions to interconnect high-density ICs with tight I/O pitches (20-40 µm peripheral) to low-cost packages and PCBs. The program targets novel packaging approaches to reduce the mechanical stress on the IC after packaging and assembly.
The program plans to provide solutions for the four major barriers to next-generation flip-chip packaging of scaled ICs and ultra-low-k dielectric ICs. Its aim is to explore and develop organic package interposer substrates that minimize stress at die and package level and enhance the wiring density, the fine I/O pitch routing capability and the high-frequency signal performance of substrates; a new generation of fine-pitch flip-chip UBM (under-bump metallization) and barrier metallization that meet the electromigration and thermo-mechanical reliability targets of flip-chip scaling; novel solder and non-solder interconnect approaches, including advanced underfill materials and processes to meet future current density, geometry and reliability requirements; thermo-mechanical modeling, design and verification for improved reliability.
The two-year program is open for the entire supply chain. The program plans to bring together 20 to 30 expert researchers from industry and academia worldwide.
IMEC and Georgia Tech will explore, develop and invent solutions to interconnect high-density ICs with tight I/O pitches (20-40 µm peripheral) to low-cost packages and PCBs. The program targets novel packaging approaches to reduce the mechanical stress on the IC after packaging and assembly.
The program plans to provide solutions for the four major barriers to next-generation flip-chip packaging of scaled ICs and ultra-low-k dielectric ICs. Its aim is to explore and develop organic package interposer substrates that minimize stress at die and package level and enhance the wiring density, the fine I/O pitch routing capability and the high-frequency signal performance of substrates; a new generation of fine-pitch flip-chip UBM (under-bump metallization) and barrier metallization that meet the electromigration and thermo-mechanical reliability targets of flip-chip scaling; novel solder and non-solder interconnect approaches, including advanced underfill materials and processes to meet future current density, geometry and reliability requirements; thermo-mechanical modeling, design and verification for improved reliability.
The two-year program is open for the entire supply chain. The program plans to bring together 20 to 30 expert researchers from industry and academia worldwide.
TEDDINGTON, UK – A report describing a new combinational test method for measuring relative reliability of electrically conductive adhesive joints on subtractive thermoplastic substrates was just released by the National Physical Laboratory.
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