caLogo

News

Optimized sockets should combine the durability and signal integrity of test sockets and the standardization (and cost) of burn-in versions.

The majority of programmable ICs worldwide are programmed as close to end-product assembly as possible. Semiconductor companies still perform sample programming for testing purposes, and may even offer programming services, but programming as a manufacturing step is increasingly the norm.

Programming methodologies generally fall into the categories of dedicated programming equipment or some manner of customized in-circuit protocol used to get data into a device. In either case the programming activity itself is essentially the same: the application of device-specific instructions for the correct timing and voltage levels necessary to write proprietary data to the device silicon. These proprietary data make up the OEM's intellectual property that makes a cellphone behave as a cellphone or a set-top box behave as a set-top box. Proper instruction sets, or algorithms, and quality programming equipment are vital for correctly transferring and storing data in silicon. Dedicated programming equipment with device-specific algorithms written to specification by the equipment manufacturer is the best way to achieve reliable, repeatable results in this process.

Programming yield refers to the percentage of programmable IC devices that pass through the programming process so that the data stored in silicon matches that which was contained in the original data file. Programming equipment performs various tests during programming to ensure this match-up and delivers a verifying "pass" message upon completion. Similar tests check that the correct IC device is being used, that the device is properly seated in the programming socket, that the device is indeed blank prior to programming and that supported pre-programming parameters are properly executed. Failure of any of these steps will adversely affect programming yield. Although many variables can adversely affect programming yield, this article focuses on the socket-to-device interface.

A definition of reasonable programming yield must take into account equipment and process as well as silicon. Even in the most stringent programming environment, consistent yield of 100% is suspect. All manufacturers of programmable ICs make some allowance for bad silicon despite rigid sample testing and quality control. In a superior programming process, yield of 99.8% over time is achievable. High-volume operations will typically account for programming on a cost-per-part basis using machine cost, consumable costs like socket adapters, and other factors. Yield cost is often overlooked and yet a variance of as little as 1% would double scrap cost on a 100,000 piece programming job.

Dedicated programming equipment, whether manual or automated, is always based on a socketed interconnect from programmer to device. The initial test performed when a device is inserted into a programmer socket is a continuity check to ensure that all device pins are making good electrical contact with the socket pins. While programming yield can be affected by various setup and handling errors, contact resistance in the socket contact and signal integrity between the device and programmer pin drivers are usually the first areas of investigation for yield issues.

As devices are cycled through a socket, resistance increases between the socket contacts and the device leads. This increased resistance interferes with the signals that are transferred between the device and the programmer. Eventually, the signal is either degraded to the point where the device is not successfully programmed, or the return signal from the programmed device does not return to the programmer. In either case, the programmer will read and record this as a failed programming operation.

Each time a package is inserted into a socket, the contacts press against the leads of the package to make electrical contact. In the case of BGA packages, which do not have hard leads, the contacts press against soft solder balls. The contacts not only meet the surface of the solder ball, but also penetrate beneath the surface. A small amount of solder migrates onto the socket contact after each interconnect cycle. This thin layer of solder begins to oxidize as it is exposed to air between programming operations.

The more packages that are inserted, the thicker the layer of oxidized solder becomes. Although solder itself is conductive, the oxidization layers add to the overall resistance of the interconnect. There are two primary reasons for this: 1) The thin oxidized film on each layer is resistive, and this resistance is additive in series; and 2) the layers are not strongly bonded at a molecular level, because the solder is mechanically wiped or pressed onto the contact surface. This creates gaps between the layers, which result in a mechanically poor electrical path. The result is that as each device is mechanically cycled through the programmer, socket resistance increases.

Types of Socket Interconnect

The burn-in socket. To program an IC, industry has long used a traditional burn-in socket. The origin of IC burn-in is reliability testing, which is an integral part of the backend assembly and test process of virtually all semiconductor producers. There is a need to stress devices to identify weak units. This is achieved by placing devices in burn-in sockets which provide a temporary connection for the device I/Os. This testing uses extremes of temperature (-55°C to 175°C) and voltage to force failure and expose those devices that should be sorted or scrapped.

The most common burn-in sockets are for CSP, BGA, QFP, TSOP and PLCC device packages. Usually the socket body consists of high-temperature glass-filled polymer material. The interconnect contact material is typically beryllium copper (BeCu) with contact plating of gold over nickel, gold, or nickel-palladium (NiPd) for Pb-free applications. The socket could also include metal components manufactured from stainless steel, brass and other alloys.

Various interconnect contact styles are used in sockets that are available today. Contact designs vary based on the package types that they accommodate and the requirements that the sockets must meet, both mechanically and electrically.

Reliability issues arise when certain burn-in contact technologies are used in a programming environment. Plated leads on packages such as PLCCs and QFPs can be contacted with significant normal force (50-plus g), but the solder balls of BGA packages do not have the mechanical integrity to sustain these contact forces. As BGAs have grown in popularity, socket designs have been modified to reliably connect to solder balls, while concurrently minimizing solder ball damage, or "witness marks." BGA sockets typically contact devices with 10 to 25 g normal forces, and for fine pitch CSP this value can drop below 10 g. This five-times reduction in normal force stems from burn-in socket requirements that must not damage solder balls exposed to temperatures of up to 125°C. This causes reliability issues for sockets in volume programming production environments because programming is conducted at ambient temperatures. In essence, the solder balls could withstand a higher degree of force but as a result of the design of the burn-in socket, such force is not applied. Figure 1 compares cycle life of a typical QFP vs. BGA socket during initial use. The graph also demonstrates how socket life can be prolonged through the use of an electrochemical cleaning and restoration process. Low-yield sockets can be cleaned and restored to maximum yield, which makes this an effective tool to combat yield issues associated with solder contamination.

Figure 1

Contaminated BGA burn-in sockets often exceed 10% reject rates after only 5000 programming cycles. Figure 2 shows this dramatic rate of yield falloff in detail.

Figure 2

In addition, BGA packages have also raised the cost of the interconnect due to the complex nature of socketing a grid array package. Because of the cost and reduced life expectancy of a more delicate socket interconnect, the cost to program a BGA device may be 10 to 20 times the cost to program a device with more robust contacts like a QFP.

For example:

  • 60,000 cycles using a $30 QFP socket = $.0005 per device

  • 5,000 cycles using a $50 BGA/CSP socket = $.010 per device

Where receptacles or "socket savers" are used between the socket and an adapter board, the result is added cost to the overall interconnect solution. Although burn-in sockets are adequate for low- to medium-volume programming operations, a higher yield solution is required for high-volume operations.

The test socket. A test socket offers an alternative solution for the programming industry (Figure 3). Primarily developed for testing a packaged IC for the purposes of characterization and parametric testing during high-volume manufacturing, a test socket is a more expensive alternative to the burn-in socket when used in programming applications. Test sockets are designed and manufactured to be much more durable and provide superior electrical performance than burn-in sockets.

Figure 3

The spring probe interconnects (Figure 4) used in these sockets generally have lower contact resistance characteristics, higher resulting normal force to BGA solder balls, and are much more durable as compared to the contacts used in burn-in sockets. Spring probe interconnects are telescopic electromechanical interconnects that typically consist of one or more contact members (often referred to as the "plunger") and a helical coil spring housed within a conductive tube (normally termed a "barrel"). The spring probes are manufactured from music wire, BeCu or stainless steel. A designer selects from probes that offer exceptional DC or RF performance, controlled impedance, very low profiles, an appropriate pitch and cycle reliability.

Figure 4

Test sockets are generally custom-designed and manufactured by CNC machines. The components are milled from high-grade engineering plastics, and use the spring probes as the interconnect medium.

For a test application, the test socket is the ideal solution. Its durability, long cycle life, unique spring contact probes and ability for customization are valuable qualities necessary for the test environment. On the other hand, for the programming environment, this solution is relatively expensive on a cost-per-part basis unless the application requires very large volumes of the same device over an extended period time. More commonly, the test socket lasts much longer than is needed in a high-mix, low- to medium-volume programming operation, and underutilization of the more expensive socket technology represents waste.

Ideally sockets optimized for the programming application should combine the durability and signal integrity of the test socket contact with the standardization and price point of the burn-in socket.

Yield as a cost will always exist to some degree in volume programming operations. Any programming process can expect some fallout associated with equipment, process or silicon. The goal is to minimize exposure in all three areas that adversely affect programming yield. After process improvements, the biggest opportunity to maintain good yields is through the use of quality equipment, including the hidden "equipment" of up-to-date device algorithms, and an integral part of the quality equipment formula is the proper socket interconnect. The interconnect is often the first place of investigation for yield issues. Understanding the limitations and capabilities of various socket technologies gives the programming customer the knowledge to control yield variability associated with the interconnect. Armed with this understanding the customer is positioned to minimize cost-per-programmed-part and maximize efficiency.

Bibliography

  • James Forster, Ph.D., "Burn-In Sockets for Chip Scale Packages," Texas Instruments Interconnection Business, Chip Scale Review, April 2001.

  • James Cawkell, "Maximizing Throughput on Automated Programming Systems," European Electronics Engineer, August 2005.

  • Ron Iscoff, "IC Test Sockets Face New, Tough Demands for Finer Pitches and Higher Performance," Chip Scale Review, March/April 2002.

 

Nick Deppen is general manager of programming services at Data I/O Corp. (data-io.com); deppenn@data-io.com. Erik Orwoll is CEO of Nu Signal LLC (nusignal.com); eorwoll@nusignal.com. Robert Duff is a product manager at UMD Technology (umdtech.com); robert.duff@umdtech.com.

Submit to FacebookSubmit to Google PlusSubmit to TwitterSubmit to LinkedInPrint Article
Don't have an account yet? Register Now!

Sign in to your account