It’s best to review every aspect, from pad design to lead length.

During the past 50 years, wave soldering with SnPb has become well understood, and guidelines for product design were developed to help maximize yields from the process. Now that environmental directives are curtailing lead use, many soldering operations are being changed to Pb-free alloys. It is known that Pb-free alloys do not behave the same way as their SnPb counterparts. Notably, they do not wet as quickly and have lower fluidity at typical processing temperatures. These differences can translate to poorer hole fill on PTH devices, more skips on SMT components, and more solder bridges on both package styles.

Design guidelines are well established for SnPb soldering and are based largely on the behaviors of molten SnPb alloy. Because some basic wetting and flow behaviors of alloys used in the process are changing, the design guidelines based on these properties must be reviewed.

What follows are up-to-date design guidelines based on experience with Pb-free wave soldering. As experience is gained and equipment and process chemistries improved, these guidelines may change to reflect those improvements. If Pb-free guidelines do not exist for a specific device or layout, the best option is to work within existing SnPb design rules until revised ones can be established.

SMT Active Devices

QFPs. Must use thieving pads. Pb-free solder does not debridge like SnPb does.

• Should be oriented at 45° to limit bridging (just like SnPb).
  
  
• 0.5 mm pitch QFPs are not recommended for Pb-free wave soldering. Notice the bridges in Figure 1.
  
  
• 0.5 mm pitch QFPs are acceptable if the circuit is a single-sided design for wave soldering only.

It is possible to debridge 0.5 mm devices repeatedly, but that typically means running lower immersion depths to improve peel-off mechanics and lower contact times to preserve flux activity, both of which limit hole fill capability.

SOICs. SOICs need thieving pads too. The preferred design is a dummy pad at the trailing edge of the device. If real-estate constraints preclude an extra pad, a pad of double width on the trailing leads of the devices may be used (Figure 2). This will help snap the solder and limit trailing-edge bridges.


SMT Discretes

Orientation. Pb-free makes proper component orientation more important than ever. Figures 3 and 4 show the effect of improper orientation on solder joint formation.


Maximum component size. It is recommended that devices larger than 1210 not be placed on bottom side for wave soldering. CTE mismatch between the device and substrate can cause joints to crack or be disturbed during cooling.

Minimum component size. Devices smaller than 0603 are not recommended for wave soldering in SnPb or Pb-free alloys. Device sizes of 0402 or smaller have historically produced yield problems in SnPb processes and, therefore, are rarely used. The 0603 devices are used regularly in wave soldering, and no substantial yield losses have been reported during the Pb-free transition.

PTH Devices

PWB stackup. The copper stackup must be symmetric at the PWB centerline. Copper stackup balance is more important in Pb-free than in SnPb because there tends to be more voids in Pb-free PTH joints (for a variety of reasons). Figure 5 shows cracks that can occur in the barrel when copper is not balanced and the circuit starts heating and cooling.


Pin-to-hole clearance. For SnPb the typical clearance is lead + 0.008" to 0.012". For Pb-free, lead + 0.015" is recommended. Pb-free alloys’ surface tension and wetting angles are higher, and the solder needs a little more space to effectively wick up holes. For nonstandard lead/hole sizes (such as power components) the rule-of-thumb is the hole size should be five to 10% wider than the comparable SnPb design.

Lead lengths. Guidelines vary by component type, pin pitch, etc. The typical design rule for SnPb is 0.050" to 0.080" lead protrusion below the PWB bottom. For Pb-free, 0.030" to 0.045" protrusion is recommended (depending on lead pitch). It is well documented that shorter lead-lengths limit solder bridge production in wave soldering. Debridging is more difficult in Pb-free soldering; shorter lead protrusions will ease that difficulty.

Trace design. The most common Pb-free solder alloys (SAC305 and SAC405) erode copper much faster than SnPb. These alloys can attack traces rapidly. To protect the trace, either mask-define the annular ring, or use a design similar to the teardrop trace (Figure 6).


A recent study showed that after 10 sec. dwell on a SAC305 solder wave, 56% of the 0.005" trace exposed by soldermask relief was eroded. Thickening the trace that will be eroded during soldering will not stop the erosion process, but can help guard the final product against signal integrity loss and reliability issues.

Pad design. Square pads on the solder side create debridging problems by altering the solder flow (Figure 7). Pb-free solders are not as forgiving to turbulence in the laminar flow. It’s OK to use square pads to designate pin 1 on the topside, if necessary, but they are not recommended because of potential pad lifting in corners. For PTH devices with pitches less than 2 mm, oval pads will help debridging (Figure 8).


PTH integrity. If barrel walls are not sufficiently strong to handle the longer, hotter thermal excursion during wave contact, internal pressure builds and blows through the hole walls, resulting in blowholes and “solder balloons” (Figure 9).


For SnPb, the typical callout for barrel plating thickness was 18 to 30 µm. The recommended Pb-free plating thickness is 25 to 40 µm, with 25 µm considered the minimum thickness, particularly if long dwell times on the wave are anticipated. This should be specifically called out in the fabrication package, and should be brought to the board supplier’s attention.

Conclusion

Pb-free soldering has just begun to see high production volumes, and from an experienced perspective, remains in relative infancy. As the industry learns more of the nuances associated with Pb-free solders, we can expect equipment designs, flux chemistries and alloys will evolve, and design guidelines are likely to evolve with them. While many design attributes are discussed herein, not every situation has been addressed. One clear aspect with the transition to Pb-free wave soldering is that the process window gets tighter. Unlike SMT, there have been no documented scenarios where the Pb-free process is actually more forgiving than SnPb. Therefore, if a particular situation has not been reviewed for Pb-free manufacturability, the safest bet is to strictly adhere to established SnPb guidelines.

Ed.: For a companion piece on the challenges of Pb-free wave soldering, see http://pcdandm.com/cms/content/view/2953/128/.

Dale Lee is principal R&D mechanical engineer at Boston Scientific Corp. (bostonscientific.com); dale.lee@guidant.com. Denis Jean is senior staff process engineer at Plexus (plexus.com); denis.jean@plexus.com.

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