Traditional boundaries of backend process and SMT assembly have become diffused.

Within mainstream surface mount assembly, bare die wire bonding directly to the PCB substrate and adjacent to other soldered components has long been practiced for low end to high performance assemblies. The backend IC industry, with its decades of understanding wire bonding metallurgy, finds itself acquiring and adapting SMT know-how to the field of packaging. The surface mount industry, however, may find it relatively harder to deal with the complexities of wire bonding. This article reviews metalization options and interactions for COB, while considering needs of the bonding process and soldering.

Apart from size and footprint advantages, organic-based packaging offers a significant spinoff: It is a platform readily adaptable by the IC backend toward attaching multiple dies and other active and passive components on a substrate within an IC (BGA or CSP). After overmolding, the resulting assembly creates a highly functional device. Systems-in-package (SiPs) and multichip modules are two examples.

Thus, after decades of packaging – typically – a single die on a metal lead frame, the face of IC backend is being permanently transformed and acquiring the flavor of a PCB assembly-like process, albeit one involving dies and surface mount all within the package itself. Other than the final overmold and ball attach, if applicable, the process replicates the COB-SMT concept as deployed for mainstream surface mount assembly.

COB metalization basics. In the most common COB layout (Figure 1), bond finger pads are arranged in an array around the die (fanout only). P (power) and G (ground) rings may be included within the signal I/O bond finger ring. Several P and G rings may be permitted; however, when present, rings must be covered by solder mask, except at the bonding sites. This protects the metalization and prevents inadvertent shorts.


Bond finger pads must respect PCB design rules for line spacing and width. Solder mask openings in the bond finger are used only to permit bonding in open areas. (Figure 1, bottom left).

Die placement area metalization. If electrical conductivity to die is required, then die placement area metalization is needed. Figure 2 shows a typical example of pad sizing, wire lengths and layout (based on a pocket dictionary product example) for a die of approximately 9.5 x 5 mm with an I/O count of 184. The pad length enables a one-time re-bond (rework). For reliability reasons, re-bonds are never performed over previously bonded spots on the pads.¹


In high reliability, industrial applications, or areas such as packaging, this metalization must provide a barrier to copper migration into silicon die. Gold over nickel is used for high-end applications, with nickel providing a barrier against copper migration. For the low-end, nickel (sans gold) is adequate for low-cost applications.

As a rule, dies for power applications are not advised for COB because of the significant CTE mismatch between the silicon die and organic substrate.¹ Overmolded assemblies such as SiPs or MCMs are more robust and tolerant of this aspect. Placement metalization may be designed to improve thermal performance if needed for a specific situation. This would take the form of vias (copper filled) in the placement metalization connected to the bottom or innerlayers.

If electrical conductivity to the die itself is not required, placement areas with solder mask become feasible. Significant variables to consider are the compatibility of the die bonding material to the mask, the mask cure condition, absorbed moisture and contamination – all of which can affect surface activation energy and hence die-substrate adhesion. With solder mask, placement coplanarity becomes an important variable: A few mils of die tilt can lead to mis-bonds during wire bonding process.¹

Bonding variables fishbone diagram. Figure 3 shows the variables fishbone tree. The process itself is far more complex and sensitive to any encountered in mainstream SMT. When variables for both the SMT process and COB are combined, the resulting fishbone diagram appears formidable. Solder joint reliability is to surface mount as bond reliability is to the bonding process – the latter co-related to bond pull strength. As Figure 3 shows, the metals and resulting bond metallurgy play a significant role in attaining this important parameter. Understanding both the metallurgical interactions in COB and the soldering metallurgy is essential to process development and failure analysis.


Bonding Wires

Gold and aluminum bonding wires, the backbone of IC wire bonding for decades, continue to be default choices. Materials such as copper wire and silver surface metalization are also coming into focus, although use is not as prevalent in COB. Among the important mechanical considerations influencing bonding wire selections are tensile properties, elongation (EL) and break load (BL).²

Electrical properties are application dependent; however, each material produces different metallurgical interactions with the die pad metalization and substrate metalization. Because substrate metalization interacts uniquely with different solder alloys, it is therefore an important consideration in balancing the needs of wire bonding and soldering. Table 1 compares bulk properties of various materials.

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