News
Vitronics Soltec (Oosterhout, the Netherlands) has announced the schedule for their third annual European seminar tour, "Lead-Free Soldering: How Ready Are You . . . Really?" With the July 1, 2006 deadline for conversion to lead-free soldering rapidly approaching in Europe, this tour is designed to help electronics assemblers accelerate their conversion efforts to be ready and compliant on time.
The 2004 tour is based on Vitronics Soltec's "5 Steps to Lead-Free Soldering" program, includes the company's latest findings and addresses the lead-free process for all three automated soldering processes: reflow, wave and selective soldering.
In the morning sessions, highlights of the "5 Steps" program will be covered, including backward and forward compatibility within lead-free processing, effect of cooling rate on solder joint structure, compatibility of equipment materials with new alloys and many case studies illustrating challenges, pitfalls and success stories drawn from real life.
Other sessions include Success Factors for Lead-Free Wave Soldering, Conversion to Lead-Free Selective Soldering, High Speed Lead-Free Reflow Soldering, Lead-Free Cause and Effects, 5 Steps User Information and an interactive session whereby detailed presentations will be given on topics chosen by the attendees.
The seminar schedule is as follows:
September 2004
07 - UK, Manchester
09 - Ireland, Limerick
14 - Portugal, Porto
15 - Spain, Terrassa
16 - France, Rennes
21 - Hungary, Szekesfehervar
22 - Austria, Vienna
23 - Slovenia, Kranj
28 - Germany, Hannover
29 - Germany, Würzburg
30 - Switzerland, Zürich
October 2004
11 - Italy, Padova
12 - Italy, Bergamo
13 - Italy, Fiuggi
14 - France, Archamps
19 - Poland, Gdansk
20 - Denmark, Arhus
21 - Sweden, Stockholm
26 - Finland, Espoo
28 - Benelux, Oosterhout
29 - Benelux, Oosterhout
November 2004
02 - Turkey, Istanbul
04 - Czech Republic, Brno
For more information or to register online, visit www.vitronics-soltec.com.
Copyright 2004, UP Media Group. All rights reserved.
The impact of lead-free solders on printed circuit board (PCB) design will be the cornerstone of the keynote address at PCB Design Conference East 2004 in Manchester, NH. In his keynote on October 5, Joe Fjelstad will cover materials, feature design and finishes likely to be impacted by the switch to lead-free boards
Fjelstad is the well-known cofounder of SiliconPipe, a Silicon Valley IP firm dedicated to extending the limits of copper-based circuit technology.
"While some PCB designers believe the move to lead-free will have no effect on the way they design boards, others predict that lead-free will affect the designer's job at every level," said Fjelstad. "As a concerned designer, what can you do to ensure that your designs will be sufficiently robust to survive lead-free assembly and the operational environment for which the design was intended?"
Fjelstad has more than 30 years of international experience in electronic interconnection and packaging technology. Before founding SiliconPipe, Fjelstad was the first fellow of Tessera, the chip packaging firm. He is author or editor of several books and numerous articles on electronics manufacturing. Fjelstad is also a prodigious inventor, with more than 150 U.S. patents issued or pending.
"We are thrilled that Joe Fjelstad will deliver the keynote address at PCB East 2004," said UP Media Group (Atlanta, GA) president Pete Waddell. "His experience and knowledge make him the perfect person to deliver a keynote that complements this year's conference theme: ‘Education for Your Most Pressing PCB Design Challenges, Including Lead-Free, Embedded Components, High Speed and PCB Design Fundamentals.' "
A number of conference courses also focus on lead-free, currently the hottest issue in PCB design, manufacture and assembly.
The keynote address is free for all conference and exhibition-only registrants; however, space is limited. Interested parties are urged to register for the keynote online at www.pcbeast.com.
Copyright 2004, UP Media Group. All rights reserved.
The Surface Mount Technology Association (SMTA, Minneapolis, MN) has announced the program for the International Wafer Level Packaging Congress on Oct. 10-12 in San Jose, CA. The program is now available live on the SMTA Web site.
The exhibition will track leading-edge IC packaging and test technologies with special emphasis on 3-D stacked packaging. It includes a three-day technical program and two days of exhibits presented by leading suppliers to the semiconductor packaging and testing industry.
Full details on the courses, technical sessions and special events can be found at: http://www.smta.org/iwlpc/.
Copyright 2004, UP Media Group. All rights reserved.
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