Circuits Assembly Online Magazine - Features

San Francisco – A March poll of CIOs nationwide predicts an 8.6% growth in IT budgets over the next year, up from 7.8% in December’s poll. Deutsche Bank analyst Chris Whitmore added in a research note that spending projections were up in all categories, except security software, which was flat.

Paris – Alcatel yesterday unveiled a planned merger with its smaller U.S. rival Lucent Technologies for $13.4 billion. Together, the pair would have total revenue of $25 billion, roughly matching current industry leader Cisco Systems.

The two companies plan to cut about 10% of their combined workforce, or about 8,800 jobs.

SAN BERNARDINO, CA -- The long-awaited deal for Photocircuits, the Glen Cove, NY, manufacturer of printed circuit boards, was made official Friday with the sale of the company business to a newly formed subsidiary of American Pacific Financial Corp.

AMPAC, a private equity group, purchased the company at auction. No financial details were provided in the announcement, although previous reports indicated the purchase price was around $43 million.

NORCROSS, GA -- Assembléon, the supplier of placement machines, named Leo van de Vall president and chief executive of Assembléon Americas Inc. He replaces Michael Buscher, who founded the American branch several years ago.

The move is effective today. He is based in the company's office outside Atlanta.

HIALEAH, FL -- Electronics contract manufacturer Simclar Inc. reported 2005 revenue of $61.2 million, up 14% from 2004. The net income was $1.3 million, compared to $2.3 million in 2004.

Much of the revenue gain -- 55% -- came via acquisitions; year-on-year sales of preexisting business units rose 6.5%.

Cerritos, CA -- Corelis and Mentor Graphics will host a half-day JTAG seminar in Richardson, TX on Wednesday, April 5.

Topics will include:
Introduction to boundary-scan technology;
Board interconnect testing using boundary-scan;
In-system programming (ISP) of CPLDs, FPGAs and Flash memories;
Automating boundary-scan insertion into ASICs, ICs and cores;
Typical design flow;
Value of automation with BSDArchitect;
Components of boundary-scan insertion;
Integration with other on-chip test methodologies such as scan and MBIST;
Integration with board-level test methodologies.

The seminar is free and intended for ASIC designers, board designers, test engineers and managers who would like to understand JTAG test methodologies. Previous knowledge of boundary-scan technology is not required.

For more information and to register, visit: www.corelis.com/Dallas_Seminar_Invite.htm