Supporting customers that might not have Lean.

Lean manufacturing has come to mean a lot of different things. This can be particularly true in the EMS industry because of tradeoffs required to support multiple customers that may or may not have fully implemented Lean. This month, we focus on waste driven by the nature of EMS and ways to eliminate it.

Customer-driven constraints. “The customer made me do it” is a frequent justification for tolerated inefficiencies in the EMS world. In some cases, there really isn’t an acceptable corrective action. However, in others the inefficiency exists because the provider simply hasn’t sold the customer on the benefits of working more efficiently.

This issue needs to be addressed from both a business and a manufacturing process optimization standpoint. On the business side, forecasting methodology, optimum bond sizes and pull signals need to be mutually agreed on. On the manufacturing side, product needs to be analyzed for potential inefficiencies, and a roadmap should outline potential cost reductions over time. EPIC has developed a formally documented design for manufacturability/testability (DfM/DfT) review process that includes a detailed analysis of cost reduction opportunities and a ranking scale that “prioritizes” identified design issues by their potential cost impact. Joint EMS-customer design review meetings are held, and these working groups focus on sequential improvements that both enhance efficiency and align with customer long-term cost reduction goals. While this solution does not always completely eliminate all identified areas of inefficiency, it does provide the customer with a clear picture of what is driving unnecessary cost and a path to eliminating that cost.

Supplier-driven constraints. EMS companies face two major challenges in supply base management. First, the supply base will always have more than the optimum number of suppliers because of customer-approved vendor list requirements. Second, not all suppliers conform to the best in Lean processes.

We use a component technology review team to better address this continuing challenge. The team serves as an interface between our materials organization and process and test engineering groups. Its goal is to look at both the materials group’s requirements for best suppliers relative to quality and price, and whether or not chosen suppliers’ products are performing as specified on the production floor. This internal analysis is combined with partnering efforts with strategic suppliers. Suppliers share their current capabilities and technology roadmaps, and we share requirements and opinions on what works or could be improved relative to a given component or material. One example of this type of partnering relates to solder products. We maintain standardized processes and have teamed with a solder products supplier to better optimize its process.

The technology roadmap discussions also are shared with end-customers as part of addressing specific long-term goals such as miniaturization or increased product functionality.

Equipment constraints. Equipment strategy in EMS companies can evolve over time. Growth through acquisition can add a number of different equipment platforms. The end result can be uniquely configured production lines that are hard to balance and create significant process variation between facilities.

We have standardized companywide on our equipment and process choices with two major goals: reduce changeover time through use of flexible, easy-to-program equipment, and minimize the impact of high-mix production through broader process windows. In some cases, there has been partnering with specific suppliers to enhance existing equipment capabilities. As facilities have been acquired, excess and incompatible equipment has been rapidly redeployed or sold. The result of this standardized approach has been faster throughput, more efficient project transfers and/or multi-site builds, easier integration of acquired facilities, better utilization of manufacturing resources and the ability to quickly implement companywide process optimization initiatives.  

Personnel constraints. In a high-mix EMS environment, even the best Lean systems are challenged by variations in demand. Often the constraint is personnel-driven rather than equipment-driven. Underutilization of people resources is another form of waste. While a robust Lean system may seek to minimize production personnel, it should be doing that by building strong teams of cross-functionally trained employees who can migrate between production areas as needed.

Continuous improvement should have a strong focus on enhancing employee contributions. For example, we found that 5S philosophy was best implemented as an operator-launched, operator-driven process, rather than as a quality or management-driven process, because operators really had the best visibility into what was needed in effective policies and procedures.  CA

Ryan Wooten is engineering manager at EPIC Technologies (epictech.com); ryan.wooten@epictech.com. His column runs bimonthly.

Opening the package reveals the potential defects within.

Decapsulation, or de-cap, is a failure analysis technique that involves removal of material packaging from an integrated circuit. After de-cap, visual inspection by optical microscopy of the internal circuitry may reveal areas where damage is most likely to have occurred. In addition, scanning electron microscopy with energy dispersive x-ray spectroscopy can identify the composition of any anomalies present after de-cap under higher magnification.

Removing package material can be performed either mechanically or chemically, depending on the IC design. With ceramic packaging, de-cap usually is done mechanically by chiseling off the top with a fine razor and small hammer. For plastic packaging, de-cap requires chemical etching by strong acids. Here, we look at de-cap by chemical etching.

Step 1. Using x-ray inspection, identify where the die is relative to the IC (Figure 1). The manufacturer datasheet may also specify the clearance from the package top to the die. Using a marker, draw an outline of the die on the top surface of the IC and mark the side for approximate depth to the die.

Step 2. Attach an abrasive point to a Dremel rotary tool (with variable speed control) and slowly drill a small cavity into the IC (Figure 2). Apply gentle pressure and keep within the outline and depth that you have marked on the IC. Use caution when drilling to avoid damage to the die and wire bonds.

Step 3. Prepare a hot plate in a fume hood and set the temperature to 100°C. An acetone spray bottle, a waste beaker, and tweezers should be within reach. Also, several disposable pipettes should be available in the fume hood.

Step 4. Following proper safety precautions (including a chemical lab coat/apron, safety goggles, and thick butyl gloves), pour out a small amount (10 to 15 mL) of fuming nitric acid and fuming sulfuric acid into separate labeled vials while under the fume hood.

Step 5. When the hot plate has reached 100°C, dispense a few drops of fuming nitric acid into the drilled cavity. Allow the acid to etch the plastic packaging until the reaction appears to slow. Using tweezers, hold the IC over the waste beaker and flush with acetone to clean out the debris and flush any remaining acid. (Note: Acetone is extremely flammable. Keep away from the hot plate.) Once the die is exposed, switch to fuming sulfuric acid and remove the plastic packaging near the wire bonds following the same procedure. Stop etching when the acid can no longer remove plastic packaging or may damage internal circuitry (Figure 3). 

The ACI Technologies Inc. (aciusa.org) is a scientific research corporation dedicated to the advancement of electronics manufacturing processes and materials for the Department of Defense and industry. This column appears monthly.

The need for reusable tests is driving standalone boundary scan-ICT integration.

Manufacturers face simultaneous trends: ever-increasing high-speed signal technology and diminishing test access. Currently, in-circuit test (ICT) remains the major, if not the sole, electrical test strategy on most manufacturing lines. The reason: It covers the entire manufacturing fault spectrum. Within the electrical process test itself, there are a few alternative electrical testing methodologies (Figure 1):

Flying probe. These use moving mechanical probes to make contact with a component lead or testpoint. They are used primarily on prototype boards because they permit fast program development and debug without the need for a fixture. However, due to slower test execution and limited coverage, they are typically not adopted for mainstream production testing.

Manufacturing defect analyzer. After ICT, MDA is one of the most commonly used high-volume test systems. The main benefit is the lower cost compared to ICT, as well as the lower cost of the fixtures used. The main drawback is it lacks the ability to test assemblies in a more complex powered mode such as digital test, mixed test, functional analog test, flash programming and boundary scan testing.

Functional test. Although it has been around the high-volume manufacturing line for a while, functional test is not meant to replace ICT. It is not designed to capture specific component faults or pinpoint the actual failure sources, such as shorted pins or resistors with wrong values.

Standalone boundary scan. This tool was built to support the IEEE 1149.1 standard and includes functionality such as memory testing and programming. The main benefit is the low cost of implementing it across the product cycle from prototype to functional test, down to field repair, without the need to redevelop the test program at every stage (Figure 2).

Standalone boundary scan has proven to be the best alternative to ICT because of its flexibility of implementation and ability to deal with limited access challenge on an assembly. The typical setup involves a PC connected to a boundary scan controller box via a LAN/USB interface that can be easily deployed to any part of the manufacturing line. By contrast, ICT systems, which have a bigger footprint, are normally fixed in one location between the wave solder station and functional testing stage. The need for ICT bed-of-nails (fixture) also prohibits ICT testing from being implemented during the early stages of prototype and design/engineering validation.

What about ICT with built-in or native boundary scan capabilities? How can manufacturers weigh this option opposite standalone boundary scan tools on the manufacturing floor? Even before standalone boundary scan tools gained popularity, many ICT systems had their own native boundary scan software to support the IEEE 1149.1 requirements. Table 1 shows the boundary scan tests available between an ICT system and standalone boundary scan tools.

In general, ICT offers the advantage of more manufacturing test options compared to standalone tests, as a result of its ability to access nodes using the conventional bed of nails. However, the standalone boundary scan tool can offer capabilities closer to functional testing, such as flash programming using boundary scan and iBIST. The only barrier so far for standalone boundary scan is its limited ability for integration into high-volume manufacturing areas such as that for computer motherboards, where there are minimal boundary scan interconnects, and where more than 50% of the nodes are still either in analog, mixed signal or non-boundary scan digital signal modes (Table 2).

Use of standalone boundary scan tools on a manufacturing line continues to be confined to areas such as assembly prototyping, debugging and diagnostics for volume manufacturing, while ICT with native boundary scan software will remain the preferred method of manufacturing testing because of its ability to test the rest of the shorts, opens, analog components and digital devices at speeds that match the throughput of the manufacturing line (Figure 3). ICT system providers also have been increasing their native boundary scan capability via vectorless powered tests, which integrate vectorless testing technologies such as VTEP and boundary scan testing to increase test coverage on connectors, sockets and non-boundary scan devices. 

Jun Balangue is technical marketing engineer at Agilent Technologies (agilent.com); jun_balangue@agilent.com.

The latest addition to the database shows a flip chip component reflowed using a Pb-free process to a standard laminate printed board. Based on optical inspection, a question was raised over one of the joints at the far left and the fiber contamination. The component was x-rayed and the solder joints were found to be satisfactory. Small fibers like the one in Figure 1 are not uncommon on the surface of printed boards. They can be airborne contamination held in place by the flux applied prior to flip-chip placement. Random in-process inspection of boards prior to component placement and inspection of bare boards for cleanliness could be considered remedies.

These are typical defects shown in the National Physical Laboratory’s interactive assembly and soldering defects database. The database (http://defectsdatabase.npl.co.uk), which is available to all Circuits Assembly readers, allows engineers to search and view countless defects and solutions, or to submit defects online.  

Dr. Davide Di Maio is with the National Physical Laboratory Industry and Innovation division (npl.co.uk); defectsdatabase@npl.co.uk.