S510 Semiconductor Reliability Test System is a high channel count, turnkey solution for reliability testing and lifetime modeling of ULSI CMOS processes at the 65 nm node and beyond. Said to provide a high degree of wafer-level reliability (WLR) test throughput and flexibility, reducing the time to assess reliability and to perform lifetime modeling. Can also be used for production WLR monitoring or as a lab parametric test system.

The fully automated, multi-channel parallel reliability test system features scalable channel counts from 20 to 72 channels, an independent stress/measure channel for each structure and simultaneous measurement across all channels. Can test multiple devices simultaneously on a wafer in conjunction with a semi-automatic or fully automatic probe station. 

Keithley Instruments, www.keithley.com

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