Surface roughness can increase electric field strength and capacitance.
Conductor surface roughness directly interferes with conduction in high-frequency circuits. How is this? Surface conductivity (or RF resistivity) of a metal film is a function of frequency, as conduction decreases exponentially from the surface into the film. But it’s a Catch-22; the “roughness rule” states the rougher the interface between metal and substrate, the better the adhesion, but the higher the attenuation.
Scientists have long studied the effect of grooves present on the surface of a conductor, having noted the additional losses through the conductors caused by them. In worst-case scenarios, the grooves cause losses that sometimes reach a factor of two. The explanation proposed was electromagnetic (EM) waves travel mostly along the surface of a conductor; e.g., the copper signal trace. The grooves effectively cause the signal paths to become longer, as the EM waves, while traveling along the surface, enter in and then exit from the grooved shapes.
Powder abrasion is an effective means for removing UV-curable materials.
Could vendor collaboration get to the root cause of an intermittent soldering problem?
Simply put, the ultimate function of a PCB assembly line is to create millions of solder joints without error. This task is complicated by the myriad materials that come together during assembly, and relies on the quality of each lead, pad and sphere to be soldered. When a soldering defect is discovered, it is common practice to presume the soldering materials are the cause, which seems logical, considering it is a solder defect. This assumption is often misplaced. This scenario plays out regularly, as illustrated in a recent case submitted to our failure analysis team for diagnosis.
In this case, the assembler had an intermittent solderability issue with a component. It brought the problem to its local representative’s attention on several occasions. The issue was isolated to a single component and was repairable at the rework station. It was a nuisance but didn’t interfere with production schedules. The situation was difficult to address; it was intermittent and subtle, but persistent. And each time the representative brought its solder supplier’s field engineer for site visits, the solderability issue was not present. Solder companies detest these types of issues because they have a negative effect on customer satisfaction and product perception.
Microvias have a domino effect, increasing available copper and lowering resistance.
Today electronic devices typically use designs with complex requirements that only high-density interconnect (HDI) technology can meet. Component manufacturers support the move by making components with smaller pitches. Because they are using more I/O connections, larger FPGAs and ASICs operate at higher frequencies, and the sharper rise times require smaller PCB features. The HDI PCB process supports these requirements exceptionally.
HDI PCB designs use microvias that offer a number of electrical benefits, and they also improve the power integrity of the assembly. This enhanced integrity comes from such sources and enhancements as decoupling capacitors, presenting a smaller mounted inductance, and chip pinouts requiring fewer perforations, thus delivering better performance from planes. The HDI PCB process also uses dielectrics of different thicknesses that reduce plane capacitance compared to conventional design.
A primer on the steps for building advanced PCBs.
To get more functionality out of boards but within the same or reduced board sizes or areas, OEMs are increasing the density of the product by means of high density interconnect (HDI) boards, which are PCBs with multiple layers vertically connected with blind or buried vias.
HDI PCBs use high-performance thin materials, and have fine copper lines and microvias. While various methods are available, some patented, some not, we use what’s known as Every Layer Interconnect (ELIC) technology, which produces very thin flexible PCBs with high functional density per unit area. Advanced HDI PCBs make use of multiple layers of copper-filled stacked in-pad microvias that enable interconnections with even greater complexity.
Soldering is the only process where the outcome can be impacted in real time.
One of AIM’s field engineers came back from a cross-country trip this week with stories of a profiling issue that was giving the client difficulties. Ultimately, the issue was design-related with a large ΔT that could not be overcome with the equipment used in production. It took a full day of attempts to make that final assessment.
Many engineers and technicians I work with rank reflow profiling alongside getting their teeth cleaned or an early morning workout. You know you need to do it, and the benefits are significant, but they aren’t immediate, and it is an unpleasant chore. Let’s take a minute to go over best practices for reflow profiling. Ideally, a “golden board” will have been supplied as part of the work kit by your customer or your design team. This board (FIGURE 1) will be a sacrificial, fully populated assembly with thermocouples attached (ideally five to seven) with high-temperature solder in strategic locations across the assembly. This board can be processed through the reflow oven to collect detailed information to ensure proper solder reflow temperatures are achieved within the temperature constraints of other components on the assembly.