News

PCB Design

“HDI Technology Moves Into Mainstream Design”

Author: Happy Holden; happy_holden@mentor.com.

Abstract: More than 2,800 pins on a 1.0 mm pitch BGA is not unusual, along with 392 pins on a 0.50 mm pitch device. Faster rise-times, as well as the for signal integrity, require an increasing number of power and ground pins. Consequently, this drives the need for additional layers in multilayers and the need for HDI with microvias. Microvias are the principal feature of HDI, along with thinner dielectrics and finer lines and spaces. This article covers the major drivers for HDI: when they should be used and when they are not appropriate, including integration of high-I/O and fine-pitch devices; higher component density and component I/Os; reduction in layer count for thickness control and RoHS compliance; improved electrical performance and SI; improved thermal performance; effective integration of embedded passives, and lower costs through less layers and smaller boards. (Printed Circuit Design & Manufacture; pcdandm.com/cms/content/view/3112/95/, December 2006)

Laminates

“Laminate Material Selection for RoHS Assembly”

Authors: Ed Kelley and Erik Bergum, ed.kelley@isola-group.com. 

Abstract: Improvements in one property, but often this can adversely affect other important properties. For example, it is relatively easy to formulate a resin system with a high time to delaminate in conventional T260 or T288 tests, or to engineer a resin system with a high decomposition temperature. However, this is often achieved at the expense of other (e.g., mechanical) properties and may make the material more difficult to use successfully in conventional PCB manufacturing processes without sacrificing design flexibility. Higher temperature Pb-free assembly has an impact on each of the three main components of laminate materials: resin system, glass cloth and copper foil. Substantial work describing the impact of Pb-free assembly temperatures on the base materials and finished PCBs has identified critical base material properties to consider when selecting a material for Pb-free assembly. This article describes a new tool for determining whether a given material is compatible with Pb-free assembly. (Printed Circuit Design & Manufacture; pcdandm.com/cms/content/view/3054/95/, December 2006)

Reliability

“JCAA/JG-PP Lead-Free Solder Project Joint Test Report Executive Summary”

Author: NASA Acquisition Pollution Prevention (AP2) Office

Abstract: This summary of Pb-free and SnPb solder joints. It found that component type has the greatest effect on joint reliability performance (greater than does solder alloy) for thermal cycling and combined environments. PTH components are more reliable than SMT components for thermal cycling and combined environments. Component location on the board has a significant effect on solder joint reliability performance for vibration. Mixed solder BGA-225s failed early for thermal shock. For some component types and environments, Pb-free solders are as reliable as eutectic SnPb solder. In others, Pb-free solders fail before the SnPb control. For many components SACB solder joints were at least as reliable as the SnPb controls during the combined environments and thermal cycling tests. (Exceptions were when SACB was contaminated with SnPb.) SAC-soldered components were at least as reliable as the SnPb soldered controls for -20° to + 80°C thermal cycling. However, SAC-soldered components were often less reliable than the SnPb soldered controls during -55° to +125°C thermal cycling, vibration and combined environments. Under high-stress conditions, SnPb generally outperforms Pb-free. For low stress conditions, Pb-free generally outperforms SnPb. “Manufactured” (high Tg) SnPb solder joints outlasted “rework” (low Tg) SnPb solder joints during thermal cycling and combined environments testing. Therefore, PWB laminate characteristics (i.e., CTE and modulus) can be expected to affect the lifetime of Pb-free soldered hardware. (http://acqp2.nasa.gov/LFS/JTR%20Executive%20Summary
%20Draft%20July-14-2006.pdf, July 2006)

 

“The Effect of Filling Via-in-Pad on Voiding Rates in PWB Assembly for BGA Components”

Authors: Chrys Shea, Rahul Raut, Lou Picchione, Quyen Chu, Nicholas Tokotch and Paul Wang, Ph.D; cshea@cooksonelectronics.com.

Abstract: Although solder pastes have been designed to minimize voiding, and processing guidelines exist to mitigate void formation during reflow processing, the presence of a microvia in a PWB pad can contribute significantly to void formation. It is believed that the depression in the pad caused by the microvia traps air during stencil printing, and air cannot fully escape during reflow. A process of filling vias with copper during board fabrication, thereby eliminating the depression that contributes to voids, was tested for its effectiveness in void mitigation during assembly. The test compares the voiding results of filled vias with those of unfilled vias and flat pads with no vias. The test vehicle, methods and test results are discussed in detail. (IPC/Jedec International Conference on Lead-Free Electronic Components and Assemblies, December 2006)

 

Circuits Assembly provides abstracts of papers from recent industry conferences and company white papers. With the amount of information increasing, our goal is to provide an added opportunity for readers to keep abreast of technology and business trends.

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