CAMBRIDGE, UK – The road to fully autonomous vehicles is, by necessity, a long and winding one; systems that implement new technologies that increase the driving level of vehicles (driving levels being discussed further below) must be rigorously tested for safety and longevity before they can make it to vehicles that are bound for public streets. The network of power supplies, sensors, and electronics that is used for Advanced Driver Assistance Systems (ADAS) – features of which include emergency braking, adaptive cruise control, and self-parking systems – is extensive, with the effectiveness of ADAS being determined by the accuracy of the sensing equipment coupled with the accuracy and speed of analysis of the on-board autonomous controller.
The on-board analysis is where artificial intelligence comes into play and is a crucial element to the proper functioning of autonomous vehicles. In market research company IDTechEx’s recent report on AI hardware at the edge of the network, “AI Chips for Edge Applications 2024 – 2034: Artificial Intelligence at the Edge”, AI chips (those pieces of semiconductor circuitry that are capable of efficiently handling machine learning workloads) are projected to generate revenue of more than USD$22 billion by 2034, and the industry vertical that is to see the highest level of growth over the next ten year period is the automotive industry, with a compound annual growth rate (CAGR) of 13%.
The part that AI plays
The AI chips used by automotive vehicles are found in centrally located microcontrollers (MCUs), which are, in turn, connected to peripherals such as sensors and antennae to form a functioning ADAS. On-board AI compute can be used for several purposes, such as driver monitoring (where controls are adjusted for specific drivers, head and body positions are monitored in an attempt to detect drowsiness, and the seating position is changed in the event of an accident), driver assistance (where AI is responsible for object detection and appropriate corrections to steering and braking), and in-vehicle entertainment (where on-board virtual assistants act in much the same way as on smartphones or in smart appliances). The most important of the avenues listed above is the latter, driver assistance, as the robustness and effectiveness of the AI system determines the vehicle's autonomous driving level.
Since its launch in 2014, the SAE Levels of Driving Automation have been the most-cited source for driving automation in the automotive industry, which defines the six levels of driving automation. These range from level 0 (no driving automation) to level 5 (full driving automation). The current highest state of autonomy in the private automotive industry (incorporating vehicles for private use, such as passenger cars) is SAE Level 2, with the jump between level 2 and level 3 being significant, given the relative advancement of technology required to achieve situational automation.
A range of sensors installed in the car – where those rely on LiDAR (Light Detection and Ranging) and vision sensors, among others – relay important information to the main processing unit in the vehicle. The compute unit is then responsible for analysing this data and making the appropriate adjustments to steering and braking. In order for processing to be effective, the machine learning algorithms that the AI chips employ must be extensively trained prior to deployment. This training involves the algorithms being exposed to a great quantity of ADAS sensor data, such that by the end of the training period they can accurately detect objects, identify objects, and differentiate objects from one another (as well as objects from their background, thus determining the depth of field). Passive ADAS is where the compute unit alerts the driver to necessary action, either via sounds, flashing lights, or physical feedback. This is the case in reverse parking assistance, for example, where proximity sensors alert the driver to where the car is in relation to obstacles. Active ADAS, however, is where the compute unit makes adjustments for the driver. As these adjustments occur in real time and need to account for varying vehicle speeds and weather conditions, it is of great importance that the chips that comprise the compute unit are able to make calculations quickly and effectively.
A scalable roadmap
SoCs for vehicular autonomy have only been around for a relatively short amount of time, yet it is clear that there is a trend towards smaller node processes, which aid in delivering higher performance. This makes sense logically, as higher levels of autonomy will necessarily require a greater degree of computation (as the human computational input is effectively outsourced to semiconductor circuitry). The above graph collates the data of 11 automotive SoCs, one of which was released in 2019, while others are scheduled for automotive manufacturers’ 2024 and 2025 production lines. Among the most powerful of the SoCs considered are the Nvidia Orin DRIVE Thor, which is expected in 2025, where Nvidia is asserting a performance of 2000 Trillion Operations Per Second (TOPS), and the Qualcomm Snapdragon Ride Flex, which has a performance of 700 TOPS and is expected in 2024.
Moving to smaller node sizes requires more expensive semiconductor manufacturing equipment (particularly at the leading edge, as Deep Ultraviolet and Extreme Ultraviolet lithography machines are used) and more time-consuming manufacture processes. As such, the capital required for foundries to move to more advanced node processes proves a significant barrier to entry to all but a few semiconductor manufacturers. This is a reason that several IDMs are now outsourcing high-performance chip manufacture to those foundries already capable of such fabrication.
In order to keep costs down for the future, it is also important for chip designers to consider the scalability of their systems, as the stepwise movement of increasing autonomous driving level adoption means that designers that do not consider scalability at this juncture run the risk of spending more for designs at ever-increasing nodes. Given that 4 nm and 3 nm chip design (at least for the AI accelerator portion of the SoC) likely offers sufficient performance headroom up to SAE Level 5, it behooves designers to consider hardware that is able to adapt to handling increasingly advanced AI algorithms.
It will be some years until we see cars on the road capable of the most advanced automation levels proposed above, but the technology to get there is already gaining traction. The next couple of years, especially, will be important ones for the automotive industry.
Report coverage
IDTechEx forecasts that the global AI chips market for edge devices will grow to US$22.0 billion by 2034, with AI chips for automotive accounting for more than 10% of this figure. IDTechEx’s report gives analysis pertaining to the key drivers for revenue growth in edge AI chips over the forecast period, with deployment within the key industry verticals – consumer electronics, industrial automation, and automotive – reviewed. Case studies of automotive players’ leading system-on-chips (SoCs) for ADAS are given, as are key trends relating to performance and power consumption for automotive controllers.
More generally, the report covers the global AI Chips market across eight industry verticals, with 10-year granular forecasts in six different categories (such as by geography, by chip architecture, and by application). IDTechEx’s report “AI Chips for Edge Applications 2024 – 2034: Artificial Intelligence at the Edge” answers the major questions, challenges, and opportunities the edge AI chip value chain faces. For further understanding of the markets, players, technologies, opportunities, and challenges, please refer to the report.
For more information on this report, please visit www.IDTechEx.com/EdgeAI, or for the full portfolio of AI research available from IDTechEx please visit www.IDTechEx.com/Research/AI.
MANASSAS, VA – ZESTRON, the leading global provider of high-precision cleaning products, services, and training solutions in the electronics manufacturing and semiconductor industries, is happy to announce that Senior Application Engineer, Ravi Parthasarathy, will be presenting "Revolutionizing PCB Assembly Cleaning: The Next Generation of pH-Neutral Defluxing Agents" at the upcoming SMTA International event. The presentation is scheduled for Thursday, October 12th, at 10:30 AM.
With years of experience and expertise in electronic assembly cleaning, Ravi is poised to deliver a thought-provoking session that delves into the future of PCB assembly cleaning techniques. Attendees can expect to gain insight into the potential of pH-neutral defluxing agents and their role in transforming the industry landscape. ZESTRON encourages all attendees to mark their calendars for this informative session. Ravi's presentation is anticipated to be an engaging and insightful experience for electronics professionals and enthusiasts alike.
SMTA International is one of the electronics assembly industry's premier annual events, bringing together professionals, researchers, and experts to exchange ideas and insights. Ravi Parthasarathy's presentation promises to be a highlight of this year's conference, offering attendees a unique opportunity to explore the latest advancements in PCB assembly cleaning.
For more information about ZESTRON and their innovative cleaning solutions, please visit ZESTRON duringt he show at Booth #1401.
CLINTON, NY – Indium Corporation Regional Product Manager Wisdom Qu will present at the SMTA China South Technical Conference, held in conjunction with NEPCON Asia, on October 11 in Shenzhen, China.
Qu will present on the challenges of large BGA warpage and the use of low-temperature soldering processes to solve those challenges. With the rapid growth of 5G computing and AI, the high integration design of CPU/GPU BGAs poses typical challenges for the electronics assembly industry. Large BGA and PCB HDI design and mismatched coefficients of thermal expansion have become more severe. These challenges can result in excessive warpage of BGAs during the manufacturing process, resulting in a number of solder defects.
“To reduce thermal deformation in BGAs and PCBs, the industry is exploring the use of low-temperature soldering processes,” said Qu. “Bi/Sn-based low-temperature solder alloys, with their lower melting points, can decrease thermal stress during the soldering process, thereby reducing thermal deformation.”
As Regional Product Manager for PCB Assembly Solder Paste in Asia, Qu facilitates business development and growth of PCB assembly product offerings, focusing on solder paste. A certified SMT process engineer, she has more than 17 years of experience in surface mount technology and earned a degree in mathematics from Hubei Radio and Television University in China.
NEUSS, GERMANY – Yamaha Robotics SMT Section has supplied three Sigma G5SII surface mounters and the latest YRi-V 3D optical inspection system to Vimar, which produces wiring devices, systems for smart home and building automation, video door entry, CCTV and temperature control products.
Vimar has chosen the Yamaha equipment for a new surface-mount assembly line going live this summer in the Company’s new logistics and production hub at Marostica, north eastern Italy. The new line delivers extra manufacturing capacity, needed to meet surging market demand for Vimar’s products, which utilise advanced technologies to support secure, safe, and energy-efficient living. They include smart switches, home automation products, climate management controllers, door entry systems, and others. Some of these products are based on Bluetooth® wireless technology or KNX protocol and they are widely used in all environments, from small to large buildings, as well as ships and yachts.
“Smart spaces are designed to be comfortable, connected, and enhance sustainability. We believe they should be stylish too, and our approach has won industry awards throughout Europe,” explains Michele Campagnolo, Engineering Manager and Purchasing Director at Vimar. “We blend great aesthetic designs with cutting-edge technology embedded in our products. Our long-standing connection with Yamaha helps ensure all the electronic assemblies we build are of the highest quality.”
Vimar already owns three Yamaha G5SII mounters and has extensive experience with the Sigma platform, having worked with Yamaha key account manager Riccardo Fiocchi for more than 20 years. According to Michele Campagnolo, the existing machines have delivered excellent reliability and advanced features that help maintain consistently high placement speed and accuracy. He adds, “When we expanded the factory and planned our new line, we chose the Sigma G5SII again for its excellent performance and to keep compatibility with our existing feeders and nozzles. Riccardo at Yamaha understands our business and the values we seek to maintain, so his help enabled us to ensure the right specification for our needs.”
In the existing line, the three G5SII machines are working alongside a Yamaha YSi-V 3D AOI system. The YSi-V delivers inspection resolution up to 12Mpixels, with 4-angle inspection at multiple wavelengths to enhance accuracy. Vimar’s manufacturing team members are familiar with the YSi-V and pleased with its abilities to help quickly localise the causes of any defects. It can identify in near real-time the exact mounter nozzle and stencil aperture concerned with any discovered defect.
“Our YSi-V AOI has performed so well that the next-generation YRi-V system was the only choice we considered for the new line,” continues Michele Campagnolo. “With AI-accelerated component recognition and even more powerful inspection capabilities, we can introduce new products more quickly and rely on consistent inspection coverage. This will allow us to continue creating new board designs that leverage greater component density to pack more features in smaller dimensions.”
The YRi-V has an enhanced illumination system with an 8-way projector that prevents shadowing to enhance inspection of closely spaced components. The new system also comes with an upgraded image-processing subsystem that accelerates inspection cycle time by at least 60%, 4-angle camera resolution increased to 20Mpixel, and a new and enhanced 5µm lens option that can spot defects such as minute scratches and cracks in the most state-of-the-art miniaturised component packages. Moreover, the embedded AI uses machine learning to automate component-library selection and generate new component files, as well as aiding pass/fail image assessment.
“The latest-specification Sigma G5SII delivers advanced performance with legacy compatibility, and the next-generation YRi-V 3D AOI is ready to inspect the most difficult and challenging assemblies,” comments Yamaha’s Riccardo Fiocchi. “Combining both in their new line has enabled Vimar to increase manufacturing capacity while also securing future-proof capability. It’s good to see that the team is equipped to succeed as the building automation market continues to grow and evolve.”
CAMBRIDGE, UK – It is no secret that electronic devices are becoming increasingly compact, with greater functionality contained in smaller volumes. As such, increasing efforts are being made to mount integrated circuits (ICs) and other components such as antennas closer together, sometimes within the same semiconductor package. This proximity means that conventional board-level shielding of electromagnetic interference (EMI) with metal enclosures is being replaced with package-level shielding, with metallic coatings applied directly to semiconductor packages.
IDTechEx’s report “EMI Shielding for Electronics 2024-2034: Forecasts, Technologies, Applications” explores the current status and technology trends within this essential aspect of many electronic circuits. Based on IDTechEx’s expertise in evaluating developments within advanced semiconductor packaging and conductive inks, the report provides a comprehensive overview of the status, innovations, players, and opportunities within EMI shielding, focusing on developments at the package level.
Conformal package-level shielding is especially important for consumer devices where both ness and wireless communications are needed. These include smartphones, smartwatches, and AR/VR headsets. By analyzing a range of teardowns, the report identifies the types of IC packages with conformal shielding and forecasts the market for conformal EMI shielding across multiple applications.
Emerging deposition methods
At present, sputtering is the dominant method of creating conformal EMI shields. Deposition occurs in a vacuum chamber, with ions fired at a metallic ‘sputtering target’ to produce nanoscale metal particles that coat the package surface. While the capital equipment is expensive, the metallic sputtering targets are cost-effective, with many providers having existing systems installed.
Emerging methods such as spraying and printing are gaining traction and offer much lower equipment costs since no vacuum chamber is required, along with additional benefits such as reduced variation in package top and side coating thickness and fewer process steps. However, conductive inks are typically more expensive than equivalent sputtering targets per gram of deposited material due to the additional ink formulation steps. The report evaluates the merits of different deposition techniques and discusses the key players.
An additional benefit of techniques such as inkjet printing is digital selective deposition, which enables reduced material consumption and hence mitigates the higher material costs of conductive inks. As the trend towards ‘system-in-package’ architectures gains further traction, greater use of compartmentalization will increase demand for selective deposition, such as the top of a specific compartment. In the longer-term, approaches such as fully additive 3D electronics will enable EMI shielding to be integrated throughout a complex bespoke package containing multiple compartmentalized components.
<pMaterial developments
While materials for board-level shielding enclosures, and indeed sputtering, are straightforward metals and metal alloys (typically copper, steel, aluminum, zinc, or nickel), there is considerable innovation within solution processable conductors for package-level shielding. Silver-based conductive inks dominate, with available products spanning a wide range of particle sizes and rheology. The report outlines the properties of competing conductive inks marketed at EMI shielding and the status of material innovations.
Especially notable is the increasing adoption of particle-free (also known as molecular) inks, which are metalized in situ and hence produce smooth coatings and eliminate the risk of nozzle clogging. Metamaterials, in which periodic structures are introduced during manufacturing, can also be used to introduce frequency-dependent EMI shielding if desired. Another material alternative for solutions processable EMI shielding is MXenes. This term refers to a class of materials made up of metal carbides or metal nitrides that have excellent conductivity and are lightweight.
Comprehensive coverage
IDTechEx’s report “EMI Shielding for Electronics 2024-2034: Forecasts, Technologies, Applications” provides a detailed overview of the EMI shielding for electronics market, with a focus on innovations that will support the increasing adoption of heterogeneous integration and advanced semiconductor packaging. 10-year forecasts for both deposition method and conductive ink consumption are provided, drawing on analysis of consumer electronic device to assesses the semiconductor package area requiring conformal shielding. Forecasts are segmented across multiple application categories, including smartphones, laptops, tablets, smartwatches, AR/VR devices, vehicles, and telecoms infrastructure.
For more information on this report, please visit www.IDTechEx.com/EMI, or for the full portfolio of research available from IDTechEx please visit www.IDTechEx.com
NEWMAN LAKE, WA – Hentec Industries/RPS Automation, a leading manufacturer of selective soldering, lead tinning and solderability test equipment, is pleased to announce that Kyocera International has finalized the purchase of a Hentec/RPS Odyssey 1325 robotic hot solder dip component lead tinning machine.
The Odyssey 1325 is a MIL spec complaint high-volume, high-mix component lead tinning machine equipped with auto load/unload functionality and is capable of processing dual solder alloys. Designed to tin component leads for re-conditioning, gold removal and re-tinning applications, including high reliability and military applications including DIP, SIP, QFP, BGA, axial and radial components as well as BGA de-balling. The Odyssey 1325 complies with all applicable GEIA-STD-006, MIL-PRF-38535, MIL-PRF- 38524E and ANSI-J-STD-002 standards.