KISTA, SWEDEN – HANZA has decided to build a new factory section of 8,800 square meters in Töcksfors, Sweden. The new facility is a new and extension of HANZA's existing production facility in Töcksfors and will provide new areas for assembly in particular. The reason is a continued long-term good demand.

"This investment supports our concept of complete, regional manufacturing and creates a very strong offering in the manufacturing cluster Sweden," says Erik Stenfors, CEO of HANZA.

"We have a continuous increase in demand from many of our successful customer partnerships, such as the return management company Tomra, the heat pump company Thermia and Väderstad, which is one of the world's leading companies in tillage and seeding," says Morgan Sahlin, cluster manager in Sweden. "This is a significant investment for HANZA Sweden that makes it possible to follow our customers' needs."

Occupation of the new factory is planned for the turn of the year 2024/2025. In addition to the investment of SEK 75 million, the project includes specific investments in the machine park to support the increased assembly capacity.

The expansion will contribute positively to HANZA's sustainability work with energy efficiency improvements. In the new building, geothermal heat pumps will be installed to handle heating in both the new and existing premises, which means major energy savings.

HANZA has recently increased its capacity for circuit board manufacturing in Sweden through the acquisition of Orbit One with a factory in Ronneby.

CAMBRIDGE, UK – Semiconductor packaging technologies have evolved from initial 1D PCB levels to the cutting-edge 3D hybrid bonding packaging at the wafer level. This advancement facilitates single-digit micronmeter interconnecting pitches, achieving over 1000 GB/s bandwidth with high energy efficiency.

Four critical parameters shape advanced semiconductor packaging: power, performance, area, and cost:

1. Power: Enhancing power efficiency through innovative packaging technologies.
2. Performance: Boosting bandwidth and reducing communication length by shortening interconnection pitch for more input/output (I/O) points.
3. Area: Larger packaging area required for chips used in high performance computing areas, whereas smaller z-form factor are required for 3D integration.
4. Cost: Continuously reducing packaging costs by employing alternative, more affordable materials or enhancing manufacturing equipment efficiency

2.5D and 3D packaging technology:

The 2.5D and 3D packaging technologies encompass various packaging techniques.

In 2.5D packaging, the choice of interposer material categorizes it into Si-based, Organic-based, and glass-based interposers, as illustrated in the figure above. Meanwhile, in 3D packaging, the evolution of microbump technology aims for smaller pitch dimensions. However, achieving single-digit pitch dimensions today is made possible through the adoption of hybrid bonding technology, a method that directly connects Cu-Cu, signifying a significant advancement in the field.

Advantages and drawbacks of each packaging type in both 2.5D and 3D configurations

2.5D

Si: There are two alternatives within this category: Si interposer, utilizing a full passive Si wafer, and Si bridge, which can take the form of a localized Si bridge in a fan-out based molding compound or in a substrate with a cavity. The Si interposer, commonly employed in 2.5D packaging for high-performance computing integration due to its ability to facilitate the finest routing features, faces challenges associated with its cost in both materials and manufacturing compared to alternatives like organic materials, and the packaging area limitation. To address this, the localized Si bridge form is gaining prominence, strategically utilizing Si where fine features are essential. Additionally, the Si bridge structure is expected to see increased use, particularly in scenarios where Si interposer faces limitations in area, pushing beyond the 4x or 5x reticle limit.

Organic: In the report, we specifically consider organic-based packaging that utilizes a fan-out molding compound rather than an organic substrate. Organic materials, with the capability to adjust their dielectric constant lower than silicon, contribute to lower RC delay in the package. Moreover, these materials present a more cost-effective alternative to silicon. These advantages drive the emergence of organic-based 2.5D packaging. However, a key drawback lies in the challenges associated with achieving the same level of interconnect feature reduction as Si-based packages.

Glass: The glass-based approach has gained significant interest following Intel's unveiling of its glass-based test vehicle package earlier this year. Glass possesses advantageous properties, including tunable Coefficient of Thermal Expansion (CTE), high dimensional stability, and a smooth, flat surface. These characteristics position glass as a promising candidate for serving as an interposer, with routing features that have the potential to rival those offered by silicon. However, the main drawback of glass lies in its immature ecosystem and a current lack of large-volume mass production capability in the packaging industry. Nevertheless, as the ecosystem matures and production capabilities advance, the use of glass-based technologies in semiconductor packaging may see further growth.

3D

Microbump: The well-established microbump technology, based on the Thermal Compression Bonding (TCB) process, has a longstanding presence across diverse products. Its roadmap involves ongoing scaling of bumping pitch. However, a critical challenge emerges as smaller solder ball sizes in this process result in heightened Intermetallic Compounds (IMCs) formation, diminishing conductivity and mechanical properties. Additionally, close contact gaps may lead to solder ball bridging, risking chip failure during reflow. With solder and IMCs exhibiting higher resistivity than copper, their use in high-performance component packaging faces limitations.

Hybrid bonding: Hybrid bonding involves creating permanent interconnections by combining a dielectric material (SiO2) with embedded metal (Cu). With Cu-Cu hybrid bonding achieving pitches below 10 micrometers (typically around one-digit µm), advantages include expanded I/O, increased bandwidth, enhanced 3D vertical stacking, heightened power efficiency, and reduced parasitics and thermal resistance due to the absence of underfill. Challenges encompass manufacturing complexities and higher costs associated with this advanced technique.

IDTechEx’s new report, "Advanced Semiconductor Packaging 2024-2034: Forecasts, Technologies, Applications", thoroughly explores the latest innovations in semiconductor packaging technology, covering key technical trends, analyzing the value chain, evaluating major players, and providing detailed market forecasts.

The report recognizes the crucial role of advanced semiconductor packaging as the foundation for next-generation ICs. It focuses on its applications in key markets such as AI and data centers, 5G, autonomous vehicles, and consumer electronics. Leveraging IDTechEx's expertise in these sectors, the report delivers a comprehensive understanding of the impact and future trajectory of advanced semiconductor packaging in these critical fields.

CLINTON, NY – Two Indium Corporation experts are set to deliver technical presentations on low-temperature soldering at the upcoming Pan Pacific Strategic Electronics Symposium (Pan Pac), hosted by SMTA, January 29–February 1 in Hawaii.

At 1 p.m. local time on January 30, R&D Manager of the Alloy Group and Principal Research Metallurgist Dr. HongWen Zhang will deliver a presentation on the challenges of lower temperature soldering for large ball grid array, board-level assembly. The presentation will explore the challenges of heterogeneous integration in semiconductor circuits and address the associated package size issues by testing low-to-mid-temperature solder pastes. The study emphasizes the importance of sufficient molten solder volume for forming defect-free joints, particularly under conditions of component-level warpage.

At 2:45 p.m. local time on January 30, Senior Technologist Dr. Ronald Lasky will present on the status of low-temperature solders by summarizing the current totality of research on them and attempting to predict their future applications and implementations. Dr. Lasky will also review current low-temperature alternatives to tin-bismuth solders that have performance similar to SAC solder.

As manager of the alloy group in Indium Corporation’s R&D department, Dr. Zhang’s focus is on the development of the varieties of Pb-free solder materials and the associated technologies for low-temperature, high-temperature, and/or high-reliability applications. He was instrumental in inventing the Durafuse® technology to combine the merits of constituents to improve wetting, reduce processing temperatures, modify the bonding surface, and control the joint’s morphology, thus improving reliability. As principal metallurgist, he is also responsible for expanding metallurgical innovation. He and his team are responsible for using metallurgical insight to develop new products, implement improvements to existing processes and products, and measure results.

Dr. Zhang has a bachelor’s degree in metallurgical physical chemistry, a master’s degree in mechanical engineering, and a Ph.D. in material science and engineering. He has a Six Sigma Green Belt from the Thayer School of Engineering at Dartmouth College, and is a certified IPC Specialist for IPC-A-600 and IPC-A-610, as well as a certified SMT Process Engineer. Dr. Zhang has published two book chapters and more than 50 conference and journal papers, and he has been granted more than ten patents in the U.S. and globally. Dr. Zhang was awarded the Surface Mount Technology Association’s (SMTA) Technical Distinction Award in 2023.

Dr. Lasky is a senior technologist at Indium Corporation, as well as a professor of engineering at Dartmouth College and a Lean Six Sigma Black Belt Instructor. He has more than 30 years of experience in electronics and optoelectronics packaging at IBM, Universal Instruments, and Cookson Electronics. He has authored six books and contributed to several others on science, electronics, and optoelectronics; he has authored numerous technical papers. Additionally, he has served as an adjunct professor at several colleges, teaching more than 20 different courses on topics such as electronics packaging, materials science, physics, mechanical engineering, and science and religion.

Dr. Lasky holds numerous patent disclosures and is the developer of several SMT processing software products relating to cost estimating, line balancing, and process optimization. He is the co-creator of engineering certification exams that set standards in the electronics assembly industry worldwide. Dr. Lasky was awarded the Surface Mount Technology Association’s (SMTA) Technical Distinction Award in 2021 for his “significant and continuing technical contributions to the SMTA.” He was also awarded SMTA’s prestigious Founder’s Award in 2003.

NEW BRITAIN, CT — MicroCare is pleased to announce the appointment of Lu Anne Green as the Chief Operating Officer (COO). With a history of excellence in manufacturing and operational leadership, she brings a wealth of experience and expertise to this pivotal position. Green’s impressive career spans multiple industries, and she has consistently demonstrated a commitment to quality and efficiency in manufacturing and operations.

Green's background includes notable roles such as Chief Operating Officer at ELG Alloys, Principal at a Private Wholesale Food Distributor, and Senior Vice President of Global Operations at ICU Medical. Her skill set includes LEAN, Six Sigma, quality control, systems integration, profit & loss management, supply chain optimization, contract manufacturing, inventory reduction, global sourcing, logistics, and multi-site operations. Green's academic credentials include a Bachelor of Science in Mechanical Engineering from Worcester Polytechnic Institute and an MBA in Business Administration and Management from Western New England University.

As the newly appointed COO at MicroCare, Green will play a vital role in the company's ongoing commitment to manufacturing excellence and operational efficiency. She will be responsible for overseeing all manufacturing operations across MicroCare's Connecticut-based operating locations, with a focus on planning and prioritizing customer, employee, and manufacturing requirements. Green's experience in developing and implementing processes to improve operational performance, strengthen customer and vendor relationships, and mitigate health, safety, and environment risks will be invaluable in her new role.

In her capacity as Chief Operating Officer, Green will also collaborate closely with the executive team to develop and optimize organizational capabilities in alignment with the company's strategic objectives. Her expertise in supply chain management, global sourcing, and contract manufacturing will contribute to MicroCare's ability to meet its performance targets and drive manufacturing and operational capabilities to match sales activity.

Commenting on this appointment, Tom Tattersall, MicroCare CEO, said, "We are thrilled to welcome Lu Anne Green to the MicroCare team as our Chief Operating Officer. Her experience in various industries and her track record of implementing LEAN, Six Sigma principles, and quality control measures will be instrumental in further elevating our manufacturing and operational capabilities. We are confident that Lu Anne's expertise will help us deliver even better solutions to our customers and continue our commitment to excellence.”

With Lu Anne Green's appointment as the Chief Operating Officer, MicroCare is poised to enhance its position as a leading provider of manufacturing solutions in its industry. Her leadership will contribute significantly to the company's growth and operational success, and she will be a key member of the MicroCare senior executive team.