CLINTON, NY – As a proud Gold Sponsor of IPC’s Integrated Electronics Manufacturing & Interconnections (IEMI) 2023, advanced materials innovator Indium Corporation is pleased to exhibit innovative materials for e-Mobility and share technical expertise in Pune, India on August 3.

A strong supporter of the Make in India campaign, Indium Corporation’s involvement in IEMI 2023 is further evidence of its commitment to serving India’s growing electronics market now and into the future.

“With our facility in Chennai, Indium Corporation is well positioned to support regional demand for consumer and infrastructure electronics, such as EV manufacturing, mobile, 5G, and semiconductors,” said Senior Country Sales Manager Damian Santhanasamy. “We look forward to serving the Indian electronics market, not only with our innovative materials, but by providing local technical expertise.”Additionally, Associate Director for Global Technical Service & Application Engineering Jonas Sjoberg will participate in an expert panel discussion titled Importance of Electronics in Electric Vehicles. Sjoberg has more than 25 years of technical experience in the electronics industry, including developing and deploying leading-edge designs and processes for packaging and assembly; managing research and development projects and facilities; and serving as technical advisor to internal and external design, development, and manufacturing sites worldwide.

With its significant automotive industry expertise and an award-winning portfolio of proven products, Indium Corporation will feature its Rel-ion™ suite of electrical, mechanical, and thermal solutions which are designed to be reliable, scalable, and proven materials to reduce electric vehicle (EV) manufacturers’ time to market. More than three million EVs are currently on the road with Indium Corporation’s Rel-ion products.

Rel-ion material solutions deliver reliability by:

• Eliminating non-wet opens and head-in-pillow defects
• Preventing dendritic growth by meeting stricter surface insulation resistance requirements
• Preventing solder delamination with precise bondline control and increased creep and fatigue resistance
• Reducing hot spots-induced voiding through improved thermal efficiency

TOKYO – Saki Corporation, an innovator in the field of automated optical and X-ray inspection equipment, will be exhibiting its latest total line inspection hardware and software solutions at FIEE in Sao Paulo, Brazil. From 18th to 21st July 2023, visitors to booth #E09 will experience Saki’s range of world-class AOI and SPI machines, as well as the latest version of Saki’s software that is key to efficient cost-effective Smart Factory operations. Booth highlights include the latest 3Di-LS2 (18µm) machine and the 3Di-LS3 (8µm) version, which will be shown in South America for the first time. Furthermore, Saki’s inline AOI and SPI performance will be demonstrated live at the Panasonic booth #J04.

With its Total Inspection Line Solutions, Saki offers a range of quality assurance machines with superior M2M communication for streamlined product inspection. Featuring optimized software and hardware, Saki’s machinery is designed for low maintenance, operator efficiency and easy on-site upgrades for futureproofing.

Saki’s booth will allow visitors to experience the company’s latest hard- and software innovations up-close, including:

<3D-AOI> 3Di-LS3 (with 8μm resolution camera system)

Revolutionary 3D-AOI for the industry's fastest, highest-performance inspection and easy on-site upgrades and interchangeability. Features optional high-resolution Z-axis optical head control feature and side cameras for increased precision and height measurement expansion.

<3D-AOI> 3Di-LS2 (with 18μm resolution camera system)

High-speed 3D-AOI designed to support large PCB sizes up to 500 mm x 510 mm and offering a height measurement range of 20 mm and an imaging speed of 5,700 mm2/s for improved productivity.

<System Software> QD Analyzer

The SPC software suite offers a data-driven approach to continuous productivity improvement by collecting and statistically analyzing the operating status and inspection results of all equipment in the production line. The latest version of Saki’s software is key to a smart factory solution. With comprehensive reporting and real-time data, QD Analyzer is a key component in the Saki inspection range.

"The South American electronics market is demanding reliable automated inspection solutions that deliver superior quality assurance, fastest cycle times and unsurpassed inspection accuracy," said Norihiro Koike, President and CEO of Saki Corporation. "With its unified software and hardware platform, Saki's total inspection line solutions deliver exactly what this growing market requires."

Carlos Eduardo de Paula, General Manager for Sales and Service in the South American region, continued: "FIEE 2023 is the first opportunity for us to showcase Saki's latest 3D-AOI in Brazil. Show visitors are also invited to visit the Panasonic booth to experience Saki's Machine-to-Machine inspection solutions in their state-of-the-art Smart Factory SMT line. We look forward to participating in the show."

For more information about Saki visit www.sakicorp.com/en/ 

PENANG, MALAYSIA – ViTrox, which aims to be the world’s most trusted technology company, is thrilled to announce its participation in SEMICON West 2023 at the North Hall, Booth #6045 in Moscone Center, San Francisco, California, USA, from 11th to 13th July 2023.

After nine years, ViTrox eagerly returns to SEMICON West 2023 with great excitement. We will be co-exhibiting with Malaysia Pavilion, led by Malaysia External Trade Development Corporation (MATRADE). This year, our technical experts will be there to reveal the advancements in Back-end semiconductor Vision Inspection Solutions - the Tray-Based Vision Handler – TR3000i and the Post Seal Vision Handler – VR20i G2. Besides, we cordially invite customers and visitors to experience the extraordinary showcase of the V510i Advanced 3D Optical Inspection (AOI) Solution for Advanced Packaging. This is the latest AOI Solution to tackle the inspection challenges of the semiconductor segment.

The Tray-to-Tape & Reel Vision Inspection Handler –TR3000i is a cutting-edge solution for emerging industries like 5G, IoT, Automotive, and Industry 4.0. Capable of handling various IC package types and identifying defects like WETQFN, SiP, Lid Gap, and more, the TR3000i boasts high-speed inspection, automated reject sorting, and low maintenance cost. With advanced vision technologies and agile mechanical design, the TR3000i achieves complex 3D, 2D, and 5-sided vision inspection requirements.

ViTrox’s Post Seal Vision Handler – VR20i G2, which is specifically designed for reel-to-reel inspection with tape width ranging from 8 mm to 32 mm. With advanced visual inspection capabilities and enhanced automation mechanisms, the VR20i G2 reduces production downtime and human error, while minimising machine idle time. Featuring multiple vision systems and advanced vision technology breakthroughs, VR20i G2 performs various inspections, providing comprehensive and quality inspection results. It can process over 130K UPH for 2mm pocket pitch and over 80K UPH for 4mm pocket pitch carrier tape, guaranteeing higher throughput and greatly reducing the return on investment (ROI) period.

The all-new V510i 3D AOI solution for Advanced Packaging, also known as ViTrox’s V510i Semicon AOI, is innovated to provide a wide range of inspection capabilities, catering to both SMT and Advanced Packaging applications. It features breakthrough technologies such as a full segment lighting system for extensive test coverage of all surface types, including die with a highly reflective surface. It also features a Surface Defect Inspection (SDI) algorithm for various types of surface defect inspection, such as scratch, foreign materials, and contamination. Complemented by the lighting module and motorised z-height, measurements can also be extracted by the Smart Measurement feature, providing CMM-like capabilities. The V510i 3D AOI is also SECS/GEM ready. On top of being well-implemented with in-depth Artificial Intelligence (A.I.) Smart Technologies, our AOI is also IPC-CFX-2591 Qualified Products Listing (QPL) validated.

Join us for an exhilarating experience at SEMICON West 2023, where you simply cannot afford to miss out! ViTrox’s on-site experts will ensure that all your questions are answered and you will have an amazing visitation experience at our booth. Don't wait any longer - secure your spot by filling out the registration form and scheduling an appointment to meet our field experts in person. Get ready for an unforgettable encounter with ViTrox at SEMICON West 2023! For more information, contact us via enquiry@vitrox.com. We hope to see you soon!

Why Is Advanced Semiconductor Packaging Needed?

This is a data-centric world. The growing amount of data generated in various industries increasingly drives the demand for high-bandwidth computing. Applications such as machine learning and AI require powerful processing capabilities, leading to the need for dense transistor placement on chips and compact interconnection bump pitches in packaging. The latter highlights the significance of semiconductor technologies in meeting these requirements.

Semiconductor packaging has evolved from board-level to wafer-level integration, bringing notable advancements. Wafer level integration provides advantages over traditional methods, such as increased connection density, smaller footprints for size-sensitive applications, and enhanced performance.

"Advanced" semiconductor packaging specifically includes high-density fan-out, 2.5D, and 3D packaging, characterized by a bumping pitch size below 100 µm, enabling at least 10x higher interconnect densities.

Bandwidth Is Key

To enhance bandwidth from a packaging perspective, two key factors come into play: the total number of I/Os (input/output) and the bit rate per each I/O. Increasing the total number of I/Os requires enabling finer line/space (L/S) patterns in each routing layer/redistribution layer (RDL) and having a higher number of routing layers. On the other hand, improving the bit rate per I/O is influenced by the interconnect distance between chiplets and the selection of dielectric materials. These factors directly impact the overall performance and efficiency of the packaging system.

Unleashing High Bandwidth: Exploring Materials and Processing for Advanced Semiconductor Packaging

Delving deeper into achieving higher wiring density and a higher bit rate per I/O from a materials and processing perspective reveals the critical role played by the selection of dielectric materials and the utilization of appropriate processing techniques. These factors have a significant impact on the overall performance and capabilities of the packaging system.

Selecting suitable dielectric materials is crucial, considering properties like low dielectric constant, optimal CTE (as close to the CTE of Cu as possible), and favorable mechanical characteristics that ensure module reliability, such as Young's modulus and elongation. These choices enable higher data rates while preserving signal integrity and facilitating fine line/space features for increased wiring density.

In high-performance accelerators, such as GPUs, inorganic dielectrics like SiO2 have been extensively utilized to achieve ultra-fine line/space (L/S) features. Nevertheless, their use is limited in applications that demand high-speed connectivity due to their high RC delays. As an alternative, organic dielectrics have been proposed for their cost-effectiveness and ability to mitigate RC delays through their low dielectric constant. However, organic dielectrics present challenges, including high CTE, which can negatively impact the device’s reliability, and difficulties in scaling to fine L/S features.

In addition to selecting appropriate materials, the processing techniques employed during packaging fabrication play a crucial role in achieving a higher number of I/Os and improving the bit rate per I/O. The steps involved in 2.5D packaging processes, including lithography, CMP (Chemical Mechanical Planarization), etching processes, and the CMP and bonding processes in 3D Cu-Cu hybrid bonding, present challenges in achieving tighter routing and increased wiring density. IDTechEx provides detailed insights into how the choice of materials influences the fabrication processes, offering a comprehensive understanding of their impact on advanced semiconductor packaging.

Materials and Technologies Covered in the IDTechEx Report

IDTechEx's "Materials and Processing for Advanced Semiconductor Packaging 2024-2034" report is divided into four main parts, offering a structured approach to understanding advanced semiconductor packaging. The first part provides a comprehensive introduction to the technologies, development trends, key applications, and ecosystem of advanced semiconductor packaging, providing readers with a solid overview. The second part focuses on 2.5D packaging processes, delving into crucial aspects, including dielectric materials for RDL and Microvia, RDL fabrication techniques, and material selection for EMC and MUF. Each sub-section within this part presents a detailed analysis of process flows, technology benchmarks, player evaluations, and future trends, providing readers with comprehensive insights.

The report continues beyond the discussion of 2.5D packaging to the third part, which focuses on the innovative Cu-Cu hybrid bonding technology for 3D die stacking. This section provides valuable insights into the manufacturing process and offers guidance on material selection for optimal outcomes. It also showcases case studies highlighting the successful implementation of Cu-Cu hybrid bonding using both organic and inorganic dielectrics. Additionally, the report includes a 10-year market forecast for the Organic Dielectric Advanced Semiconductor Packaging Module, presented in the last chapter. This forecast encompasses unit and area metrics, providing the industry with meaningful perspectives into anticipated market growth and trends for the next decade.

To find out more about this IDTechEx report, including downloadable sample pages, please visit www.IDTechEx.com/MatsforASP