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The path to digitize a factory is both closer and cheaper than most engineers realize.

Reshoring has been a buzzword for a few years now. But when supply chains are undergoing dramatic disruption and inflation is raging worldwide, what is the reality?

According to research firm IDTechEx, it’s only a matter of time before an array of sensors and cobots spur far greater automation and flexibility. The firm recently published a white paper titled “Factory of the Future” that summarizes the expected advancements. Indeed, some of these changes are both relatively inexpensive and simple in scope yet open a realm of possibilities for greater process control.

IDTechEx senior technology analyst Matthew Dyson, Ph.D., who co-authored the paper, discussed the key trends in industrial manufacturing and the timeline for adoption with PCEA president Mike Buetow in late July. The following is lightly edited.

Mike Buetow: You just co-authored a white paper titled “Factory of the Future.” Lots of people, of course, are considering what that looks like. What spurred your interest?

Matthew Dyson: It’s the combination of technologies that we see being developed. The white paper is a compelling use case for them. It’s about how you can make manufacturing more efficient to address concerns like reshoring, inflation and so on.

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Data-driven processes require IP coordination among vendors – and that means humans.

We hear a lot these days about smart manufacturing, but is there a broad consensus on what it means, and more specifically, its application in electronics assembly? Brian Morrison, vice president of engineering for Vexos, a mid-tier multinational EMS with manufacturing facilities in the US, Canada, China and Vietnam and more than 900 employees worldwide, explains his views on smart manufacturing to PCD&F/CIRCUITS ASSEMBLY in July.

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Political and supply-chain issues could not slow printed circuit growth in 2021.

 The author attended his first IPC meeting in 1966. At that time, the consensus was the world PCB output was $500 million. Some “knowledgeable” experts predicted PCB output would dwindle since semiconductors were rising rapidly and PCBs would not be needed. If that $500 million assessment was correct, in 55 years the PCB market grew 192 times, to $96 billion!

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An EMS finds VPS dramatically reduced HiP in BGA/LGA connectors.

Head-in-pillow (HiP) defects are one of the most common issues that affect printed circuit boards containing ball grid array/land grid array (BGA/LGA) packages. These defects can result in costly repairs and reduce a component’s lifespan. HiP defects are compromised solder joints often attributed to undesired environmental factors during the reflow process. These factors include reflow in an oxygen-filled environment, exposure to temperatures surpassing a component’s thermal limit, and uneven thermal distribution across the PCB.

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A new specification tackles the application and performance of organic solderability preservatives.

After many years of starts, stops and debate, an industry committee has finally developed a standard for organic solderability preservatives (OSPs). IPC-4555, Performance Specification for High Temperature Organic Solderability Preservatives (OSP) for Printed Boards, is out now, and it was a long time coming.

With the electronics industry fully entrenched in lead-free soldering, a standard for OSP is critical. There are more stringent requirements for solder joint reliability, resistance to corrosion, as well as additional requirements related to complex substrate designs.

The development and acceptance of IPC-4555 dispels the myth all OSPs are the same. With circuit boards fabricated around the globe, and small chemical firms attempting to introduce “new OSP processes,” buyers must be aware. Greater solderability requirements – measured as joint strength, paste spreadability and hole fill – and higher temperatures of lead-free soldering have greatly diminished use of conventional (standard substituted benzimidazole-based) OSPs. With the development of third- and fourth-generation organic solderability preservatives based on a novel aryl-phenylimidazole compound, however, OSP has regained its leadership role as a final finish, particularly in Asia and Europe. In addition, the technology shift to bare copper PWBs with selectively plated gold features requires OSPs that do not tarnish or deposit on the gold.

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A case study showed a well-balanced aqueous cleaning agent removed Pb-free, water-soluble tack flux residues better than straight DI water.

Solder bump technology is problematic below 150µm pitch, since it is challenging to manufacture and assemble. As the bump pitch size shrinks, solder bumps have many limitations in the fine-pitch process. Bump printing, plating or bump drops, along with bump pad sizes, are the major constraints; as a result, risk of shorts increases. Today, dies in production have as many as 25,000 bumps per die. It has been predicted this number will increase to 50,000 to 60,000 per die in the next year or two.1

Another form of bump gaining more popularity is the copper pillar. These bumps, instead of being spherical in shape, are in the form of a pillar, with various shapes and sizes. The most popular shape is in the form of a cylinder. The pillar shape allows the high ratio of bump height to bump diameter, therefore permitting very tight pitch, even when bump heights are large. Sometimes a solder cap is formed on top of the pillar to help with connectivity with the mating chip.1 Due to the cylindrical shape and non-collapsing nature of Cu pillar bumps, they can be easily mounted on the fine trace of the laminate. Copper pillars are terminals used to flip-chip IC chips to a substrate in a semiconductor package by thermal compression flip-chip (TCFC) technology. Copper pillars are formed on aluminum electrode pads of an IC chip.

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