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Press Releases

LYON, FRANCE – Yole Group is part of Chiplet Summit 2024. The Summit occurs on February 6-8 at the Santa Clara Convention Center.

The Chiplet Summit program is now available HERE.

Chiplets improve chip yields and costs but still provide the performance of a large monolithic chip. Designers can mix and match chiplets, use the process technologies best suited to specific functions, take advantage of chiplet IP, and simplify moves to new process nodes, avoiding wafer waste and manufacturing defects. Chiplets are the key to producing the extremely high-density, high-performance chips required for today’s networking, storage, AI/ML, analytics, media processing, HPC, and virtual reality applications.

Chiplet Summit covers the latest architectures, development platforms, and applications. It includes pre-conference seminars, keynotes, annual updates, and paper and panel sessions. It covers all aspects of chiplet development, including design, interconnect, packaging, integration, and testing.

At Chiplet Summit 2024, Principal Analyst, Computing Tom Hackenberg and Technology & Cost Analyst, Computing Ying-Wu Liu from Yole Group present a “Market Research Update” in the leadoff plenary on “Chiplet Markets Are Rising: Where and When?”

In addition, Tom Hackenberg heads an expert panel on market research in the closing session which will discuss market trends in “Chiplets in 2028 and How We Got There” and provide a keynote for the Open Compute Platform Track. This panel discussion will be moderated by Bill Wong, Technology Editor for Electronic Design. In addition to Tom, panelists include John Shalf from Lawrence Berkeley Laboratory, Bapi Vinnakota from the Open Compute Project, and Jawad Nasrullah from Palo Alto Electron. More info.

Be sure to meet Yole Group’s computing analysts at Chiplet Summit 2024; book a meeting with them now: HERE.

CLINTON, NY – Indium Corporation Regional Technical Manager and Technologist – Advanced Applications Andreas Karch will present at iNEMI’s upcoming seminar, Humidity Robustness and Isolation Coordination for e-Mobility. The seminar, hosted by ZESTRON Europe, will be held on February 1 in Ingolstadt, Germany.

Andreas’ presentation, No-Clean Flux Residues in Automotive Applications Must Meet Higher Requirements, will examine the influence of no-clean flux chemistries on the reliability of automotive PCB applications. In particular, the study focuses on failure caused by dendritic growth for high-power, low-standoff components for enhanced SIR conditions.

Due to increased automotive electrification (48V, HEV, EV) and the subsequent utilization of high-power components such as DPAKs and Power-QFNs in under-the-hood electronics, the SIR (Surface Insulation Resistance) specifications for evaluating the electrical reliability of no-clean solder paste flux chemistry have also become more stringent. For example, test voltage has increased from 5V to 10–50V, test time has increased from 168 to 500–1,000 hours, pitch has decreased from 0.5mm to 0.2–0.3mm, and minimum SIR threshold has increased from 100MΩ to 500MΩ.

No-clean solder pastes are normally used in automotive PCB assembly to solder low-standoff components such as DPAKs and power-QFNs (gap between the PCB pad and the component underbody is typically under 75µ).

“During reflow, volatiles in the flux chemistry, such as activators and solvents boil off; however, a lower standoff reduces the opportunity for the flux volatiles to vent, resulting in ‘wet’ flux residue post-reflow,” said Andreas. “It is, therefore, critical that the no-clean flux residue does not cause ionic dendritic growth and corrosion under low-standoff power components, throughout the working life of the product.”

Andreas serves as Technologist – Advanced Applications and Technical Manager for Germany, Austria, and Switzerland for Indium Corporation. He has more than 20 years of experience in automotive electronics and power electronics, including the development of advanced customized solutions. In 2014, the Austrian Patent Office awarded him the “Inventum” award for his patent for innovate LED automotive lighting as one of the top ten applicants. He is an ECQA-certified development engineer and has earned the Six Sigma Yellow Belt.

TAIPEI – Test Research, Inc. (TRI) will feature Innovative Inspection Solutions, SPI, AOI, AXI, and ICT solutions at a series of technology seminars and product demos held in Taiwan, Shenzhen, and Suzhou. Each of the one-day events will focus on the latest test and inspection technology innovations for SMT and Advanced Packaging production, including the Smart Factory and AI-powered Solutions.

TRI's 2024 portfolio will showcase High-Speed Line inspection platforms, such as the TR7700QH SII, capable of inspecting at speeds of 80cm²/s. During the seminars, there will be a demonstration of TRI's High-Accuracy and High-Resolution line for Advanced Packaging Inspection. The lineup will also feature X-ray Inspection demonstrations, such as the 3D CT AXI TR7600F3D LL SII with an improved platform for High-Speed Inspection.

Additionally, TRI will showcase Board Testing platforms, such as the TR5001 SII series with LED Analyzer for Automotive applications and the High-Pin Count Tester TR8100HL SII for High-throughput production lines. Lastly, there will be a live demo of TRI's AI-powered Solutions and the improved Yield Management System 4.0 (YMS 4.0).

To register for any of the seminars, please contact your TRI sales representative.

Location	Date	Venue
Taiwan	March 7, 2024	TRI Linkou Production Center
Shenzhen	March 13, 2024	Shangri-la Hotel, Shenzhen
Suzhou	March 15, 2024	Paradox Kunshan Hotel, Suzhou

ATLANTA — ECIA is pleased to announce the 2024 Executive Conference Core Committee. Previously announced Chair Ken Bellero, Schaffner, and Co-Chair Maryellen Stack, Sager Electronics have finalized the core committee of returning and new members who already have hit the ground running for the best conference yet.

Pam Berigan, Sager Electronics
Lori Bruno, LuscomBridge
Tobi Cornell, Kruvand Associates
Robert Derringer, Crouzet
Juliet Fajardo, TDK-Lambda
Heather Fulara, DigiKey
Bob Garcia, Ferrari Technical Sales
Nicolle Ladouceur, ROHM Semiconductor

“I am really looking forward to working with this talented group of people,” commented Stephanie Tierney, ECIA’s Director of Member Communications and Member Engagement. “2023 was a record-breaking conference on many levels: sponsorships, attendance, survey responses and more were all ahead of the year before. This group has already vowed to surpass those records, and it will be fun working with them to meet the ambitious goals they have set for the 2024 Conference,” she continued. “All I can say is, ‘Watch out for another great event planned by this fantastic committee!’”

Subcommittees will be announced soon. For more information, go to https://www.eciaexecconference.org/. Sponsorship opportunities have been released and are filling up fast!

BANGKOK, THAILAND – Fabrinet (NYSE: FN), a leading provider of advanced optical packaging and precision optical, electro-mechanical and electronic manufacturing services to original equipment manufacturers of complex products, today published its Sustainability Report for fiscal year 2023. The report highlights Fabrinet’s continued commitment to operating in an ethical, environmentally responsible, and socially supportive manner.

Seamus Grady, Chief Executive Officer of Fabrinet, said “Fabrinet’s commitment to community, sustainability and accountability is integral to our ability to drive value for our customers, employees and shareholders. Over the past year, we advanced our sustainability initiatives across multiple fronts, and are proud to share our progress with our stakeholders and the broader community.”

The report covers Fabrinet’s progress toward sustainability initiatives in fiscal year 2023, including:

Improving quality of life for our local communities
Expanding our talent pipeline through internship opportunities
Upholding our dedication to labor and human rights
Identifying sustainability opportunities through lean manufacturing
Reducing our carbon footprint
Advancing our approach to ESG oversight

The full report can be accessed on Fabrinet’s website at www.fabrinet.com/about/esg-initiatives

WASHINGTON – The Semiconductor Industry Association (SIA) today released the following statement from vice president of government affairs David Isaacs in response to the introduction in Congress of the Tax Relief for American Families and Workers Act. The legislation includes two provisions critical to the semiconductor industry: the restoration of domestic R&D expensing and the United States-Taiwan Expedited Double-Tax Relief Act.

“SIA applauds Senate Finance Committee Chair Ron Wyden (D-Ore.) and House Ways and Means Chair Jason Smith (R-Mo.) for spearheading the Tax Relief for American Families and Workers Act. The legislation restores domestic R&D expensing and seeks to resolve tax matters between the U.S. and Taiwan—two provisions essential to ensuring the competitiveness of the U.S. semiconductor industry and fully realizing the benefits of the CHIPS and Science Act.

“The CHIPS Act was passed, in part, to help unlock investments in the semiconductor R&D ecosystem here in the U.S. The requirement of amortizating research expenditures undermines those efforts and runs counter to the longstanding immediate deduction of R&D costs that helps to sustain U.S. leadership in this vital technology.

“We must resolve double taxation between the United States and Taiwan and reduce barriers to trade between the two jurisdictions. At a time the semiconductor industry is making significant investments in the U.S. following the passage of the CHIPS Act, reconciling tax matters between the U.S. and one of its top trading partners has become a pressing matter.

“We further commend the House Ways and Means Committee for approving the tax package that would implement tax policies central to the success of the U.S. semiconductor industry. We urge the House and the Senate to take up and pass this critical legislation.”